Hi, This is my first post to this forum. I have a reference oscillator of 12.7 MhZ, how do I generate the following frequencies using this oscillator 16.863406408094434 Hz 16.722408026755854 16.694490818030051 13.755158184319120 12.562814070351759 12.531328320802006 12.062726176115802 11.148272017837234 10.405827263267431 10.060362173038229 10.040160642570282 10.010010010010012 I would need roughly a 0.01Hz frequency resolution. Would a fractional PLL be a solution to this problem. Most of the papers I have read deal with increasing the output freq to several Mhz or Ghz for implementing a PLL. But this implementation of mine requires to reduce the generated freqs, I would appreciate any help advice or some kind of code which would help me solve this problem. Thanks Aryan
PLL to generate low frequencies
Started by ●June 3, 2008
Reply by ●June 3, 20082008-06-03
On Jun 3, 6:34�am, "paryanz" <dr.asth...@gmail.com> wrote:> Hi, > > This is my first post to this forum. I have a reference oscillator of 12.7 > MhZ, how do I generate the following frequencies using this oscillator > > � 16.863406408094434 �Hz > � 16.722408026755854 > � 16.694490818030051 > � 13.755158184319120 > � 12.562814070351759 > � 12.531328320802006 > � 12.062726176115802 > � 11.148272017837234 > � 10.405827263267431 > � 10.060362173038229 > � 10.040160642570282 > � 10.010010010010012 > > I would need roughly a 0.01Hz frequency resolution. Would a fractional PLL > be a solution to this problem. > > Most of the papers I have read deal with increasing the output freq to > several Mhz or Ghz for implementing a PLL. But this implementation of mine > requires to reduce the generated freqs, I would appreciate any help advice > �or some kind of code which would help me solve this problem. > > Thanks > AryanA PLL is not required for this problem. Have you read about direct digital synthesis (DDS) or the numerically controlled oscillator (NCO)? A DDS with a 32-bit phase accumulator should be capable of 0.003 Hz resolution at 12.7 MHz; to realize the frequencies you gave, a 64-bit phase accumulator may be needed (7e-13 Hz resolution). John
Reply by ●June 3, 20082008-06-03
John, Thanks for your previous reply it was very useful. I would change my question, after talking to my supervisors I have been told to generate a constant frequency of 10Mhz as an output based on the following low frequencies as an input. 16.863406408094434 Hz 16.722408026755854 16.694490818030051 13.755158184319120 12.562814070351759 12.531328320802006 12.062726176115802 11.148272017837234 10.405827263267431 10.060362173038229 10.040160642570282 10.010010010010012 So my frequencies are very low and I have to generate a constant output of 10 Mhz by using the above input frequency as an input. Would a fractional PLL be a solution to this problem. Thanks for your help in advance Aryan
Reply by ●June 3, 20082008-06-03
"paryanz" <dr.asthana@gmail.com> a �crit dans le message de news: puGdnXtMwJncg9jVnZ2dnUVZ_hOdnZ2d@giganews.com...> Hi, > > This is my first post to this forum. I have a reference oscillator of 12.7 > MhZ, how do I generate the following frequencies using this oscillator > > 16.863406408094434 Hz > 16.722408026755854 > 16.694490818030051 > 13.755158184319120 > 12.562814070351759 > 12.531328320802006 > 12.062726176115802 > 11.148272017837234 > 10.405827263267431 > 10.060362173038229 > 10.040160642570282 > 10.010010010010012 > > I would need roughly a 0.01Hz frequency resolution. Would a fractional PLL > be a solution to this problem. > > Most of the papers I have read deal with increasing the output freq to > several Mhz or Ghz for implementing a PLL. But this implementation of mine > requires to reduce the generated freqs, I would appreciate any help advice > or some kind of code which would help me solve this problem.Dear Aryan, A direct digital synthetizer (DDS) would be far more suited to your problem than a PLL. For example with a chip like the AD9832 (5$/1k budgetary price on Analog's web site) and clocked with your 12.7MHz source you will get a 32 bit tuning word meaning a resolution better than 0.05Hz from DC to around 5MHz. And will require only 10mA. See www.analog.com/dds. Friendly yours, Robert Lacoste www.alciom.com
Reply by ●June 3, 20082008-06-03
paryanz wrote:> John, > > Thanks for your previous reply it was very useful. I would change my > question, after talking to my supervisors I have been told to generate a > constant frequency of 10Mhz as an output based on the following low > frequencies as an input. > > 16.863406408094434 Hz > 16.722408026755854 > 16.694490818030051 > 13.755158184319120 > 12.562814070351759 > 12.531328320802006 > 12.062726176115802 > 11.148272017837234 > 10.405827263267431 > 10.060362173038229 > 10.040160642570282 > 10.010010010010012 > > > So my frequencies are very low and I have to generate a constant output of > 10 Mhz by using the above input frequency as an input. > > Would a fractional PLL be a solution to this problem. > > Thanks for your help in advance > AryanDo you mean you have to use one of the above frequencies for a reference and generate 10MHz from it, in a way that is somehow locked? In that case, one method you could use would be to use a DDS as the divider in a PLL, to generate, for example, a nominal 12.562...Hz feedback signal that you then lock using the 12.562...Hz reference. One good way to do this would be to sample the reference signal in a DSP, using an ADC and DDS that is clocked by the 10MHz oscillator, and servo the 10MHz oscillator from the DSP. All in all it would be a fun project to do. Just how much precision do you need? You're showing 16 significant digits -- do you really need to be locked to 0.0001 parts per trillion? And how long do you have to wait to achieve lock on a 10-20Hz signal? And how stable is it? I'm not even sure that world-class labs get timing down that precise, and if they do it's _only_ world-class labs. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" gives you just what it says. See details at http://www.wescottdesign.com/actfes/actfes.html
Reply by ●June 3, 20082008-06-03
>Just how much precision do you need? You're showing 16 significant >digits -- do you really need to be locked to 0.0001 parts per trillion? > And how long do you have to wait to achieve lock on a 10-20Hz signal?> And how stable is it? > >I'm not even sure that world-class labs get timing down that precise, >and if they do it's _only_ world-class labs.Cesium frequency standards are only accurate to 10e-12. I'm thinking there's a red herring being chased here. Mark
Reply by ●June 3, 20082008-06-03
On Tue, 03 Jun 2008 13:07:00 -0500, "markt" <takatz@pericle.com> wrote:>>Just how much precision do you need? You're showing 16 significant >>digits -- do you really need to be locked to 0.0001 parts per trillion? >> And how long do you have to wait to achieve lock on a 10-20Hz signal? > >> And how stable is it? >> >>I'm not even sure that world-class labs get timing down that precise, >>and if they do it's _only_ world-class labs. > >Cesium frequency standards are only accurate to 10e-12. I'm thinking >there's a red herring being chased here.The original poster lists freqnencies from 10Hz to 16Hz each with 15 decimal places, yet in the original post he says "I would need roughly a 0.01Hz frequency resolution" which would indicate only two decimal places would be needed for each frequency. Looks like a typical Usenet question, not even the OP knows what he's asking.> >Mark
Reply by ●June 3, 20082008-06-03
Ben Bradley wrote:> On Tue, 03 Jun 2008 13:07:00 -0500, "markt" <takatz@pericle.com> > wrote: > >>> Just how much precision do you need? You're showing 16 significant >>> digits -- do you really need to be locked to 0.0001 parts per trillion? >>> And how long do you have to wait to achieve lock on a 10-20Hz signal? >>> And how stable is it? >>> >>> I'm not even sure that world-class labs get timing down that precise, >>> and if they do it's _only_ world-class labs. >> Cesium frequency standards are only accurate to 10e-12. I'm thinking >> there's a red herring being chased here. > > The original poster lists freqnencies from 10Hz to 16Hz each with > 15 decimal places, yet in the original post he says "I would need > roughly a 0.01Hz frequency resolution" which would indicate only two > decimal places would be needed for each frequency. > > Looks like a typical Usenet question, not even the OP knows what > he's asking.He knows what he's asking. He just doesn't seem to know what he's talking about. Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●June 3, 20082008-06-03
Jerry Avins wrote:> Ben Bradley wrote: >> On Tue, 03 Jun 2008 13:07:00 -0500, "markt" <takatz@pericle.com> >> wrote: >> >>>> Just how much precision do you need? You're showing 16 significant >>>> digits -- do you really need to be locked to 0.0001 parts per >>>> trillion? And how long do you have to wait to achieve lock on a >>>> 10-20Hz signal? >>>> And how stable is it? >>>> >>>> I'm not even sure that world-class labs get timing down that >>>> precise, and if they do it's _only_ world-class labs. >>> Cesium frequency standards are only accurate to 10e-12. I'm thinking >>> there's a red herring being chased here. >> >> The original poster lists freqnencies from 10Hz to 16Hz each with >> 15 decimal places, yet in the original post he says "I would need >> roughly a 0.01Hz frequency resolution" which would indicate only two >> decimal places would be needed for each frequency. >> >> Looks like a typical Usenet question, not even the OP knows what >> he's asking. > > He knows what he's asking. He just doesn't seem to know what he's > talking about. > > JerryWhich is why he's asking. I missed the precision specifier, and got caught up in all the digits -- comes from a too-strict education in freshman physics, I suppose. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" gives you just what it says. See details at http://www.wescottdesign.com/actfes/actfes.html
Reply by ●June 3, 20082008-06-03
On Tue, 03 Jun 2008 15:18:35 -0700, Tim Wescott <tim@seemywebsite.com> wrote:>Jerry Avins wrote: >> Ben Bradley wrote:>>> The original poster lists freqnencies from 10Hz to 16Hz each with >>> 15 decimal places, yet in the original post he says "I would need >>> roughly a 0.01Hz frequency resolution" which would indicate only two >>> decimal places would be needed for each frequency. >>> >>> Looks like a typical Usenet question, not even the OP knows what >>> he's asking. >> >> He knows what he's asking. He just doesn't seem to know what he's >> talking about. >> >> Jerry > >Which is why he's asking. > >I missed the precision specifier, and got caught up in all the digits -- >comes from a too-strict education in freshman physics, I suppose.They didn't have gotcha-problems with irrelevant info to teach you to "read the whole problem before trying to solve it?" :)
