Low freq to high freq conversion

 I have a task to generate a constant frequency of 10Mhz as an output based
on the following low frequencies as an input.

 16.863406408094434  Hz
  16.722408026755854
  16.694490818030051
  13.755158184319120
  12.562814070351759
  12.531328320802006
  12.062726176115802
  11.148272017837234
  10.405827263267431
  10.060362173038229
  10.040160642570282
  10.010010010010012


So my frequencies are very low and I have to generate a constant output
of
10 Mhz by using any of the above input frequency as an input. At any given
instant I would have one of the above frequencies as a reference input,
which I would have to scale up and generate a 10 Mhz output signal.

Would a fractional PLL help me, based on the input frequency I would have
to change the accumulator values to generate the required output. Please
advise me if there is any better implementation.

Thanks
aryan


 



Thanks for your help in advance
Aryan

paryanz wrote:
>  I have a task to generate a constant frequency of 10Mhz as an output based
> on the following low frequencies as an input.
> 
>  16.863406408094434  Hz
>   16.722408026755854
>   16.694490818030051
>   13.755158184319120
>   12.562814070351759
>   12.531328320802006
>   12.062726176115802
>   11.148272017837234
>   10.405827263267431
>   10.060362173038229
>   10.040160642570282
>   10.010010010010012
> 
> 
> So my frequencies are very low and I have to generate a constant output
> of
> 10 Mhz by using any of the above input frequency as an input. At any given
> instant I would have one of the above frequencies as a reference input,
> which I would have to scale up and generate a 10 Mhz output signal.
> 
> Would a fractional PLL help me, based on the input frequency I would have
> to change the accumulator values to generate the required output. Please
> advise me if there is any better implementation.
> 
It's not clear what you mean.  In one spot you say you want to generate 
a constant output of 10MHz, but immediately after you say you want to 
use some other frequency to do it.  The algorithm for the part before 
the comma is: "ignore the input and generate a fixed 10MHz no matter 
what", the algorithm for the part after the comma is "huh?".

So what do you _really_ want to do with your low frequency signals?  Do 
you want to up-convert them to 10MHz, so that 10.01001...Hz becomes 
10000010.01001...Hz and 16.863...Hz becomes 10000016.863...Hz?  Do you 
want to multiply them by 10^6, so that 10.01001Hz becomes 10010010Hz? 
If you want to up-convert them, do you want to do it linearly, so that 
you end up building a single-sideband converter, or do you want to 
preserve frequency and phase but not amplitude?  Do you want to do 
something else entirely?

Your path will never be clear if you don't know where you're going.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" gives you just what it says.
See details at http://www.wescottdesign.com/actfes/actfes.html

Thanks for your reply Tim,

To make it clear at any given instant I am going to have one of the above
frequency available as a reference, I would have to use that and generate
10 MHZ from it, that means they are locked.

I need to implement this on a DSP processor but would like to start with
simulation in Matlab. The frequencies which I have cited above are
precisely accurate and I would have one of them available to me at any
given instant. Now I am trying to figure out how would a PLL  work out to
generate this. I am trying to implement this on a DSP board with initial
simulations in Matlab, so I could use an oscillator from the board. I would
want to use the low frequency as a reference because i know that is 
accurate and stable. 

In your other post to my question you were discussing a solution of using
the oscillator from DSP for implementing this solution along with a DDS. 

Any insight into this would be very helpful.

Thanks
Aryan

paryanz wrote:

(context restored)
Tim Wescott wrote:
 > paryanz wrote:
 >>  I have a task to generate a constant frequency of 10Mhz as an output
 >> based
 >> on the following low frequencies as an input.
 >>
 >>  16.863406408094434  Hz
 >>   16.722408026755854
 >>   16.694490818030051
 >>   13.755158184319120
 >>   12.562814070351759
 >>   12.531328320802006
 >>   12.062726176115802
 >>   11.148272017837234
 >>   10.405827263267431
 >>   10.060362173038229
 >>   10.040160642570282
 >>   10.010010010010012
 >>
 >>
 >> So my frequencies are very low and I have to generate a constant output
 >> of
 >> 10 Mhz by using any of the above input frequency as an input. At any
 >> given
 >> instant I would have one of the above frequencies as a reference input,
 >> which I would have to scale up and generate a 10 Mhz output signal.
 >>
 >> Would a fractional PLL help me, based on the input frequency I would 
have
 >> to change the accumulator values to generate the required output. Please
 >> advise me if there is any better implementation.
 >>
 > It's not clear what you mean.  In one spot you say you want to generate
 > a constant output of 10MHz, but immediately after you say you want to
 > use some other frequency to do it.  The algorithm for the part before
 > the comma is: "ignore the input and generate a fixed 10MHz no matter
 > what", the algorithm for the part after the comma is "huh?".
 >
 > So what do you _really_ want to do with your low frequency signals?  Do
 > you want to up-convert them to 10MHz, so that 10.01001...Hz becomes
 > 10000010.01001...Hz and 16.863...Hz becomes 10000016.863...Hz?  Do you
 > want to multiply them by 10^6, so that 10.01001Hz becomes 10010010Hz? If
 > you want to up-convert them, do you want to do it linearly, so that you
 > end up building a single-sideband converter, or do you want to preserve
 > frequency and phase but not amplitude?  Do you want to do something else
 > entirely?
 >
 > Your path will never be clear if you don't know where you're going.
 >
(end restored context)

> Thanks for your reply Tim,
> 
> To make it clear at any given instant I am going to have one of the above
> frequency available as a reference, I would have to use that and generate
> 10 MHZ from it, that means they are locked.
> 
> I need to implement this on a DSP processor but would like to start with
> simulation in Matlab. The frequencies which I have cited above are
> precisely accurate and I would have one of them available to me at any
> given instant. Now I am trying to figure out how would a PLL  work out to
> generate this. I am trying to implement this on a DSP board with initial
> simulations in Matlab, so I could use an oscillator from the board. I would
> want to use the low frequency as a reference because i know that is 
> accurate and stable. 
> 
> In your other post to my question you were discussing a solution of using
> the oscillator from DSP for implementing this solution along with a DDS. 
> 
> Any insight into this would be very helpful.
> 

First, a rant, then some comments on digital PLL design.

<rant>
The word "precise" means nothing without a modifier.  Precise, if it 
means anything by itself, means "absolutely precise".  Since no 
measurement can be absolutely on target, "precise" by itself means 
absolutely nothing.

_How_ precise?  You have a big trade off between precision, noise, lock 
time, and design difficulty; without taking the precision into account 
you'll never know what will work and what won't.
</rant>

You want to build a PLL that locks to a 14Hz-ish tone, or maybe a 
14Hz-ish pulse.  Hopefully you're locking onto tones, or you really 
don't need much more precision than 10PPM in spite of your 16 
significant digits.

To lock onto a tone, the best thing to do (probably) is to multiply your 
tone by a sine wave that's derived from the oscillator that you're 
locking to.  So you sample at some fairly high speed, say 10kHz (the 
exact speed to sample at depends on many factors; I'll just assume that 
10kHz is a good figure).  Keep track of your phase in 100us increments, 
and generate a sine wave; multiply this generated sine wave by your 
measured tone.

The result of this multiplication will be a signal that has two 
components: one will be at the sum of the frequencies of the two tones, 
the other will be at the difference (which you hope is zero).  If you 
sum up one cycle's worth of samples, then you'll do a good job of 
rejecting the sum-of-frequencies component, and you'll save the 
difference-of-frequencies component.  Use this sum as the error signal 
to feed to an appropriate loop filter to servo your master oscillator 
(from which you derive your 10kHz reference) and you're done.

The balance of how to do this is _way_ too big for a newsgroup posting. 
  I suggest looking for "phase estimation" or "digital PLL" on the web 
and seeing if you can find anything.  One of these days I'm going to get 
around to writing a how-to article on this, but it isn't going to be soon.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" gives you just what it says.
See details at http://www.wescottdesign.com/actfes/actfes.html

paryanz wrote:
> Thanks for your reply Tim,
> 
> To make it clear at any given instant I am going to have one of the above
> frequency available as a reference, I would have to use that and generate
> 10 MHZ from it, that means they are locked.

That's not clear (at least to me).

How accurately do you actually know the reference frequencies? Surely 
not to the number of digits you used to specify them.

How much incidental phase margin can you tolerate? PLLs of any kind 
"breathe".

How long is the 10 MHz signal allowed to be wrong when the reference 
changes abruptly? Whatever scheme you settle on, there will be an 
acquisition time.

> I need to implement this on a DSP processor but would like to start with
> simulation in Matlab. The frequencies which I have cited above are
> precisely accurate and I would have one of them available to me at any
> given instant. Now I am trying to figure out how would a PLL  work out to
> generate this. I am trying to implement this on a DSP board with initial
> simulations in Matlab, so I could use an oscillator from the board. I would
> want to use the low frequency as a reference because i know that is 
> accurate and stable. 

It is accurate to perhaps 1 part in 10^-7 and stable (after a long 
warmup) only so long as the ambient temperature is stable.

How do you intend for the microprocessor to learn the reference 
frequency? Interrupts have latency and the latency has uncertainty.

> In your other post to my question you were discussing a solution of using
> the oscillator from DSP for implementing this solution along with a DDS. 

I suspect that was when you wrote that you wanted to generate the lower 
frequencies from a 10 MHz reference.

> Any insight into this would be very helpful.

There is an easy way to generate your 10 MHz signal. For a few dollars, 
you can but a crystal oscillator that will generate 10,000,000 +/- 1 Hz 
at room temperature. For a bit more, you can buy one that is +/- .01 Hz 
from 0 to 50C.

In any case, I suspect that your precision requirements are overstated. 
There are approximately 31,556,926 seconds in a year (365.2422 days). 
Frequencies as precise as those you stated them would serve as timing 
references accurate to better that one microsecond in five years.

Jerry
-- 
Engineering is the art of making what you want from things you can get.
�����������������������������������������������������������������������

>In any case, I suspect that your precision requirements are overstated. 
>There are approximately 31,556,926 seconds in a year (365.2422 days). 
>Frequencies as precise as those you stated them would serve as timing 
>references accurate to better that one microsecond in five years.

Yeah, I noted in the other thread that cesium standards are only accurate
to the 12th place.  Is time.gov even linked to anything as accurate as 16
places?

Mark

markt wrote:
>> In any case, I suspect that your precision requirements are overstated. 
>> There are approximately 31,556,926 seconds in a year (365.2422 days). 
>> Frequencies as precise as those you stated them would serve as timing 
>> references accurate to better that one microsecond in five years.
> 
> Yeah, I noted in the other thread that cesium standards are only accurate
> to the 12th place.  Is time.gov even linked to anything as accurate as 16
> places?
> 
> Mark

Check the NIST web site.  As far as I know they're the ones with the 
most accurate clocks, and they seem to have a good idea of just how 
accurate they are.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" gives you just what it says.
See details at http://www.wescottdesign.com/actfes/actfes.html

>Check the NIST web site.  As far as I know they're the ones with the 
>most accurate clocks, and they seem to have a good idea of just how 
>accurate they are.

Their best (the US standard) is 5e-16 ppm.

http://tf.nist.gov/cesium/fountain.htm

Mmmm, I'd like to have something like that as a reference for my next
receiver design. :)

Mark

Thanks for the replies, but the degree of precision of 16 bits is not what
I am stressing on. I just copied and pasted the result from Matlab.

The reference low frequency with 3 to 4 decimal places of precision can be
considered for this implementation. I am just trying to know the method of
implementation.

So lets not see too much into the precision digits till 12 or 16 bits.

Thanks
Aryan

>The reference low frequency with 3 to 4 decimal places of precision can
be
>considered for this implementation. I am just trying to know the method
of
>implementation.

Yeah, no problem... I think we got obsessed with precision because you
included so many digits.

Well, I've never gone UP to get to my output.  Typically you have a
reference, say 10 MHz, and a VCO at a higher frequency that covers a range
of frequencies that includes your desired frequency.  The for a PLL, the
reference and VCO are both divided DOWN to some comparison frequency, and
the  phase delta (pulses in COTS parts) drives a charge pump whose output
is filtered and passed as the control voltage to the VCO.

Mark