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EFCOP of the 56307 EVM

Started by Vincent Meserette July 18, 2003
Hello,

I made a FIR filter test program to test the EFCOP and the data
transfer with DMA under the 56307 EVM. (Please see below)
The program give me good results when I put $0 in the FDBA and the
FCBA registers of the EFCOP, but no when I put another adress, even
if this adress is lower than $1000.
Could someone say me if the base adress of the FCM and the FDM should
always be $0 (I don't see anything about that in the DSP
documentation)?
In advanced, many thanks for your answers.

Vincent Meserette

;*********************************************************************
*********
; FIR filter test program with the 56307 EFCOP, with data transfer
with DMA
; VM 07/03
;*********************************************************************
*********

include 'ioequ.asm'
include 'intequ.asm' ;*********************************************************************
; EFCOP & DMA Variables
;*********************************************************************
start equ $400
CHANNELS equ 1 ; number of channels
FIR_LEN equ 2048 ; FIR length
signal equ $2000 ; input sequence base address
coefs equ $0 ; coef base address
resu equ $4000 ; result address
TEMP EQU $0 ; temp storage (FDBA) address

org p:$0
jmp start

;*********************************************************************
; Program
;*********************************************************************
org p:start

; clear memory
move #$0,r0
move #>0,x0
move #$6000,x1
do x1,end_clear_x_buff
move x0,x:(r0)+
end_clear_x_buff

move #$0,r0
move #>0,x0
move #$6000,x1
do x1,end_clear_y_buff
move x0,y:(r0)+
end_clear_y_buff

; coefs and signal storage
move #signal,r0
move #>FIR_LEN,x0
move #>0.0001,a
do x0,end_signal
move a,x:(r0)+
add #>0.0001,a
end_signal

move #coefs,r0
move #>FIR_LEN,x0
move #>0.000005,a
do x0,end_coefs
move a,y:(r0)+

end_coefs ;**********************************
; Config DMA 0 (Mem -> EFCOP)
;**********************************
movep #signal,x:M_DSR0
movep #M_FDIR,x:M_DDR0; DMA Destination is the EFCOP (Y Mem)

; Mode B

movep #$1FF003,x:M_DCO0 ;DMA Count in mode B, 512*4 transfers
movep #$1,x:M_DOR0
movep #$14AA04,x:M_DCR0
;DE = 0 (DMA Ch0 disabled for now ) */
;DIE = 0 (No interrupt at end of transfer */
;DTM = 010 (Line transfer (2D), Clear DE */
;DPR = 10 (Priority = 2) */
;DCON = 0 (Continuous mode not needed */
;DRS = 10101 (DMA Request is MDRQ11: EFCOP FDIBE) */
;D3D = 0 (Disable 3D mode) */
;DAM = 100000 (DMA Addressing Mode:
;Source = 000 (2D, DOR0 offset)
;Dest = 100 (No update) ) */
;DDS = 01 (Destination (FDIR) is in Y memory) */
;DSS = 00 (Source (input[]) is in X memory) */

;**********************************
; Config DMA 1 (EFCOP -> Mem)
;**********************************

movep #M_FDOR,x:M_DSR1 ; DMA source is the EFCOP (Y Mem)
movep #resu,x:M_DDR1 ; DMA Destination is X Mem

; Mode A
movep #$1,x:M_DCO1 ; DMA Count in mode A
movep #$0CB2C1,x:M_DCR1

;DE = 0 (DMA Ch1 disabled for now ) */
;DIE = 0 (No interrupt at end of transfer */
;DTM = 001 (Word, Clear DE */
;DPR = 10 (Priority = 2) */
;DCON = 0 (Continuous mode not needed */
;DRS = 10110 (DMA Request is MDRQ12: EFCOP FDOBF) */
;D3D = 0 (Disable 3D mode) */
;DAM = 101100 (DMA Addressing Mode:
;Source = 100 (No update)
;Dest = 101 (Post Inc by 1) ) */
;DDS = 00 (Dest (output[]) is in X memory) */
;DSS = 01 (Source (FDOR) is in Y memory) */

;**********************************
; Config EFCOP
;**********************************
lfstart
movep #$000,y:M_FCSR ; Reset the EFCOP

movep #FIR_LEN-1,y:M_FCNT ; Set the counter for FIR_LEN Coefs
movep #TEMP,y:M_FDBA
movep #coefs,y:M_FCBA
movep #$000,y:M_FACR ; Clear the FACR
movep #$0,y:M_FDCH ; channel =1
movep #$000,y:M_FCSR

;FDOIE = 0 (No Filter Data Out Interrupt) */
;FDIIE = 0 (No Filter Data Input Interrupt) */
;FSCO = 0 (No shared coefficients) */
;FPRC = 0 (State Initialization) */
;FMLC = 0 (Single Channel Mode) */
;FOM = 00 (Real FIR Filtering Mode) */
;FUPD = 0 (No Filter Coefficient Update) */
;FADP = 0 (Non-Adaptive Mode) */
;FLT = 0 (Filter Type = FIR) */
;FEN = 0 (Keep EFCOP Disabled for now) */

bset #23,x:M_DCR1 ; Enable DMA1
bset #23,x:M_DCR0 ; Enable DMA0
bset #0,y:M_FCSR ; Enable EFCOP

jmp *