DSPRelated.com
Forums

CodeWarrior for DSP 5.1 Upgrade

Started by Litinas, Terry August 7, 2003
Hi,

Are you talking about SCI1 or SCI0? Because pin 107 is for SCI0 and
you had configure the registers of SCI1 (TX1 pin 52).

Regards,

Bruno --- In , mark@b... wrote:
>
> Me again.
>
> I have tried to get data to come out of the TX0 pin(107) using the
SCI
> interface. I believe I have it setup properly but I would love it
if
> someone could check my settings just to be sure:
>
> #define (WORD*)sci1br 0x0f10
> #define (WORD*)sci1cr 0x0f11
> #define (WORD*)sci1sr 0x0f12
> #define (WORD*)sci1dr 0x0f13
>
> *sci1br = 2083; //This is 2400 baud with a clock at 80Mhz -
hopefully
> *sci1cr = 0x00CC; > now the code I execute to send data is pretty simple, maybe too
simple?
>
> result = *sci1sr;
> *sci1dr = 0x0c; //First Byte of data. TDRE should be cleared,
but it
> //isn't. Page 12-9 #2 at top
>
> while pin 15 in the sci1sr reg is 0
> result=*sci1sr;
>
> What else would I need to do to enable SCI1?






pin 107 = TXD0 = SCI1

pin 52 = TXD1 = SCI0

Consult Page 7-5 in the User's Manual.

It confused me for a day as well.

On Fri, 8 Aug 2003, evlotus7 wrote:

> Hi,
>
> Are you talking about SCI1 or SCI0? Because pin 107 is for SCI0 and
> you had configure the registers of SCI1 (TX1 pin 52).
>
> Regards,
>
> Bruno > --- In , mark@b... wrote:
> >
> > Me again.
> >
> > I have tried to get data to come out of the TX0 pin(107) using the
> SCI
> > interface. I believe I have it setup properly but I would love it
> if
> > someone could check my settings just to be sure:
> >
> > #define (WORD*)sci1br 0x0f10
> > #define (WORD*)sci1cr 0x0f11
> > #define (WORD*)sci1sr 0x0f12
> > #define (WORD*)sci1dr 0x0f13
> >
> > *sci1br = 2083; //This is 2400 baud with a clock at 80Mhz -
> hopefully
> > *sci1cr = 0x00CC;
> >
> >
> > now the code I execute to send data is pretty simple, maybe too
> simple?
> >
> > result = *sci1sr;
> > *sci1dr = 0x0c; //First Byte of data. TDRE should be cleared,
> but it
> > //isn't. Page 12-9 #2 at top
> >
> > while pin 15 in the sci1sr reg is 0
> > result=*sci1sr;
> >
> > What else would I need to do to enable SCI1? >
> _____________________________________
> Note: If you do a simple "reply" with your email client, only the author of
this message will receive your answer. You need to do a "reply all" if you want
your answer to be distributed to the entire group.
>
> _____________________________________
> About this discussion group:
>
> To Join:
>
> To Post:
>
> To Leave:
>
> Archives: http://www.yahoogroups.com/group/motoroladsp
>
> More Groups: http://www.dsprelated.com/groups.php3 > ">http://docs.yahoo.com/info/terms/





Hi Mark,

You're right, it's confusing. My reference is the Technical Data sheet of
the 56F805 rev 10. At page 7, it's clearly indicate that TXD0 (pin 107) is
for SCI0 on port E and TXD1 (pin 52) is for SCI1 on port D. Except for the
pin number, it's the same relation for the 56F807.

My first impression is that the figure 7-2 is incorrect. Maybe someone form
Motorola can give some info on this!

Regards

Bruno
-----Message d'origine-----
De : [mailto:]
Envoy: 8 ao, 2003 17:16
: evlotus7
Cc :
Objet : Re: [motoroladsp] Re: SCI1/ GPIOE + 56F805
pin 107 = TXD0 = SCI1

pin 52 = TXD1 = SCI0

Consult Page 7-5 in the User's Manual.

It confused me for a day as well.

On Fri, 8 Aug 2003, evlotus7 wrote:

> Hi,
>
> Are you talking about SCI1 or SCI0? Because pin 107 is for SCI0 and
> you had configure the registers of SCI1 (TX1 pin 52).
>
> Regards,
>
> Bruno > --- In , mark@b... wrote:
> >
> > Me again.
> >
> > I have tried to get data to come out of the TX0 pin(107) using the
> SCI
> > interface. I believe I have it setup properly but I would love it
> if
> > someone could check my settings just to be sure:
> >
> > #define (WORD*)sci1br 0x0f10
> > #define (WORD*)sci1cr 0x0f11
> > #define (WORD*)sci1sr 0x0f12
> > #define (WORD*)sci1dr 0x0f13
> >
> > *sci1br = 2083; //This is 2400 baud with a clock at 80Mhz -
> hopefully
> > *sci1cr = 0x00CC;
> >
> >
> > now the code I execute to send data is pretty simple, maybe too
> simple?
> >
> > result = *sci1sr;
> > *sci1dr = 0x0c; //First Byte of data. TDRE should be cleared,
> but it
> > //isn't. Page 12-9 #2 at top
> >
> > while pin 15 in the sci1sr reg is 0
> > result=*sci1sr;
> >
> > What else would I need to do to enable SCI1? >
> _____________________________________
> Note: If you do a simple "reply" with your email client, only the author
of this message will receive your answer. You need to do a "reply all" if
you want your answer to be distributed to the entire group.
>
> _____________________________________
> About this discussion group:
>
> To Join:
>
> To Post:
>
> To Leave:
>
> Archives: http://www.yahoogroups.com/group/motoroladsp
>
> More Groups: http://www.dsprelated.com/groups.php3 > ">http://docs.yahoo.com/info/terms/