Hi. I have 2 questions regarding using the I2S protocol with the SSI|
for the 827 EVM board. First, does anyone have any sample code for
configuring and running the SSI port and the CS4218 codec in I2S
mode? I'd appreciate a look at anything similar anyone's done.
Secondly, I want to run the port at a 48khz frame rate. The data book
seems to indicate I have to set the clock rate to some unusual value.
Does anyone know if there's a way to do this running at 80MHz (40MHz
SSI interface to codec on 56F827 EVM board
I did a similar thing with a 56009 a few years ago. One way to get to 48 KHZ is to use a low frequency input clock (12 MHz as an example--there are other possible values), then multiply it up for the 80 MHZ and also divide it down for the 48 KHZ.
One caution--if there is a phase lock loop mulitplier involved in the DSP and the CODEC IC you are using requires both a serial clock and a state machine clock to drive it, you probably should not use the DSP to generate the serial clock internally, as it will likely be out of phase with any externally derived state machine clock. Some CODECs shut off their audio outputs if the two clocks are not in sync, because, if they are not, the audio is not decoded properly and would come out as high intensity white noise, which might damage amplifiers, speakers , and the ears of listeners (imagine ocean surf at 120 dB!!). All clocks for a codec should be derived from a single high frequency source and divided down by a divider (like HC4040) to get in-phase inputs.
Lee <l...@bigfoot.com> wrote:
Hi. I have 2 questions regarding using the I2S protocol with the SSI