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Weird modulation effects when acquiring with SDR boards

Started by roblkc3 9 months ago6 replieslatest reply 9 months ago113 views

Hello!

I have been doing some experiments with SDR boards and I am facing a weird phenomenon I cannot explain with my (tiny :() knowledge of the DSP/radio world:
I have an Ettus B210 board sending an impulse with GNU Radio. The impulse has been created with the “Vector source” block by putting five ‘1’ followed by two hundreds ‘0’, and the sampling rate is 4 Msps. The carrier is at 1 GHz.
I acquire the signal, which passes through a splitter, with two Ettus N320 boards, synchronized with White Rabbit. I have varied the sampling rate between 10Msps and 5 Msps.
When I observe the acquired signals in the time domain, the amplitudes of the two seem to be modulated by something weird… In particular, when sampling at 10 Msps the two seemed to be modulated by two out-of-phase sinusoids with a frequency of around 550 Hz, whereas at 5 Msps there is no clear modulation “scheme” but, as it can be seen in these screenshots:

https://ibb.co/QdzVM6s

https://ibb.co/sRhBTD7

they are clearly distorted.

What am I observing here?
Thanks in advance and have a nice day!

Best,
Rob

[ - ]
Reply by roblkc3March 15, 2022

I have to correct myself, the "out-of-phase" part is not correct, it maybe happened by chance. I've done again the acquisition at 10 Msps and this is what I observe:

https://ibb.co/PggyT06

:S

[ - ]
Reply by drmikeMarch 15, 2022

This is simple aliasing.  Your output is 4 compared to the input of 5 or 10 (MHz).  4 and 5 have no common factors and are relatively prime, and even a touch of phase shift will give random looking results.  Plus they are not on the same source clock, so that randomizes it some more.

Change your input sample rate to 8 MHz and most of that aliasing should go away.  Because the clocks are different, you'll still get some aliasing effects, but it should look a lot more like what you expected.

Mike

[ - ]
Reply by roblkc3March 16, 2022

Dear Mike,

Thanks for your reply!

I fear I don't get your point: the signal I produce is sampled on TX at 4 Msps, and the filtering done by the trasmitter should wipe away all the components above 4 MHz of my "ugly impulse". As long as I'm sampling above 4 Msps at the receiver, why does the sampling rate matter? I expect to be able to recover exactly (ok, minus the noise on the cable) what I had on my receiver's output connector, with possibly a small distortion due to the fact that I'm most likely sampling at the "wrong" time...

I have repeated the experiment with a 1 kHz cosine wave, and the effect is way less visible but still there. The game changer was the introduction of the coherent front-end between the two receivers --- once they've shared the LOs, magically the phenomenon almost disappeared... Even weirder, if I just connect the LO exported by the first board just to the first board itself but NOT to the second board (as the schema here: https://kb.ettus.com/USRP_N320/N321_LO_Distributio... requires), then the signal received by the first board is almost perfect, while the signal from the second is again distorted:

https://ibb.co/xHxQcV3
https://ibb.co/Q9qqKcq

(just for accuracy, the impulses in the signal used for this test have a way smaller duty cycle than the initial experiments in my first message).

I fear I am missing out something very basic but very important :S

Thanks a lot and have a nice day!

Best,
Rob

[ - ]
Reply by drmikeMarch 16, 2022

It's having the same clock that's important.  The same LO means all the signals are in phase - the analog version of a digital clock that is distributed to all logic circuits.

The digital signal is translated into an analog carrier and becomes analog.  When you demodulate, you are removing the carrier and trying to get the digital signal back.  Aliasing happens when you sample out of phase with the original signal.  

One way you might see this is to plot the carrier plus signal.  Then look at what happens when you do the sampling of that signal.  The Wikipedia page https://en.wikipedia.org/wiki/Aliasing has a nice sine wave graph that hints at what you will see. 

When the LO is the same at all stages, you sample everything on the same phase point.  When the LO's are independent, you sample at random places relative to how the signal was generated.

So yes, this is basic and important!  On large systems a master low frequency clock is used to feed all boards and a local PLL then ups that for use on the board.  That way the whole system is in sync.  For radio transmission, clock recovery is a big deal for many protocols.  It's all the same basic point you are looking at here.  Definitely worth your while to fully understand what is happening.

Mike

[ - ]
Reply by roblkc3March 16, 2022

Actually, even when using the coherent frontend, the emitter has an independent LO -- it's just the two receivers that share their LO (and this is what was puzzling me).
However, I think I get your point: the emitter has a quite poor LO (at least, compared to the one in the receivers), thus the transmitter's LO frequency is significantly different from the receivers' one. When sampling to reconstruct back the digital signal, the sampling points are scattered all around, and without clock recovery and sampling time adjustment, I am bound to have wildly different values than expected...

Thanks :)

Best,

Rob

[ - ]
Reply by roblkc3March 17, 2022

I've finally found the culprit: I had enabled the automatic IQ balance, this seemed to raise hell in the acquired signals :S

Thanks again for your help!

Best,
Rob