Hi all, I am designing 3rd order modified from CIFF Sigma Delta ADC modulator for Audio signal. Our oversampling ratio is 60. I need help in finding the correct pole zero location for optimum stable design. Here are my questions,
1. How zero at 1 at unit circle (z-domain) help us in reducing DC offset and 1/f (flicker noise)?
2. why for the step input, there is ringing at output before the step? Overshoot is expected.
3. why our model SNR is not same as theoretical value? there is closet to 20db error from theoretical SNR for 3rd order (60 OSR) from our Simulink model.
Thanks
-Sunil
#Matlab #FFT #Audio #Simulink #Sigma-Delta #Modulator #ADC
Hi Sunil, Use MATLAB Delta-Sigma Toolbox: ntf = synthesizeNTF(3, 60, 1, ...) (adjust opt for zero optimization, set OBG limit for stability).
• For CIFF, map the NTF to coefficients carefully (feed-forward gains).
• Simulate with Schreier toolbox examples DSM models as reference and compare with your simulink model.
Hope it helps.
-Chalil






