Hello,

I have a custom PCI board based on TMS320DM642 and I am trying to interrupt the Host by PINTA signal. On the Host side I have a Windows 7 64-bit, and I am using a kernel mode driver (in my case Jungo WinDriver) to access the PCI memory map, IO Port, and to handle interrupt. with the mentioned driver I have access to DSP memory, and PCI registers.

There is a part in my project that DSP should interrupt the host. I do this by setting the INTREQ bit of RSTSRC, and I receive the interrupt but repeatedly at the host.

The problem is that I couldn't deassert it and I receive the interrupt until either my host software crash or the whole system hang and I have no choice but to reboot.

I tried to deassert the interrupt by setting the INTRST bit of RSTSRC or INTSRC bit if HSR port but none of these methods apparently working. 

Is there anything I am missing here? I would be grateful if somebody give me some suggestions.

Thanks,

Arash

Do you know if you are doing "edge" or "level" triggered interrupts. See https://www.jungo.com/st/support/documentation/win... and note section 9.2.2

If you are in "level" triggered mode, the kernel driver will need to clear the interrupts BEFORE it calls your user-mode interrupt handler. Otherwise, a second, third, forth, ... interrupt will immediately happen because the HW signal is still asserted.

This could explain why your PC hangs.

A "edge" triggered interrupt only happens once (on each edge). Your user-mode handler would then get to run and reset the HW so that it could generate another interrupt in the future.

actually I've read that document and I know my interrupt type is "level" triggered mode.

It is possible to set a command or chain of commands (reading/writing to ports/memory mapped addresses) with Jungo APIs, and when the interrupt be triggered those commands will executed in jungo driver. Based on this information I tried to set different registers but none of them worked.

my problem is that I am not sure whether the registers I am reading/writing are the right one, like HSR, RSTSRC which I mentioned in my first post