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Modelling Squarewave Jitter with variable sample rate

Started by sudarshan_onkar 6 months ago4 replieslatest reply 6 months ago76 views

Hi , 

           I am trying to model jitter effects for a square wave demodulation. The rms jitter is of the order of femto seconds in my area of interest . It does not make sense to use a fixed sample rate model as the sampling rate required will be too high . I am sure there are better ways to do it .  It would be interesting to know some these techniques and hence this post. Kindly share what techniques are there and what you would use. 

PS : I have a script whcih gives me time,value matrix of clock which captures jitter  and incoming signal is a ~20MHz  Signal with a sample rate of 125 MHz. I need to mix these two signals. 

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Reply by Rick LyonsFebruary 6, 2019

Hi sudarshan_onkar.

Someone here may be able to help you but you'll have to provide more information regarding your signal processing. What do you mean by "model jitter effects" and "variable sample rate"? What does the phrase "square wave demodulation" mean? In your final sentence, what two signals are you referring to? If you provide all possible details of what you are doing, someone here might be of some help to you.

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Reply by sudarshan_onkarFebruary 7, 2019

Hi Rick, 

           Sorry I might have omitted some details as they are only in my mind :-). 


So let me start fresh. What I am trying to do is to measure mag and phase of a reflected sinewave from a sensor. I excite the sensor at a particular frequency (20MHz) and wait for few cycles (4-5) for the turnaround and then start to measure the reflected wave (20MHz). To measure amp/phase I mix (multiply) incoming signal with a square wave LO (20MHz) for defined number of cycles (10-20) to produce I and Q . This is then sampled by ADC and summed to get I, Q . Post this I run cordic find mag and phase. 

I do multiple measurements and this is  where i want understand what the jitter on the LO will do to final summed value.  And my suspect is that we will not get same value of summed output all  the time even when reflection is same. So when the multiplication of sine and square wave happen the rising/falling edges move about due to jitter thus creating delta. I would like to either prove or disprove this by modelling the jitter. 

Will be happy to answer follow up questions. 




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Reply by Rick LyonsFebruary 8, 2019
Hi sudarshan_onkar.

I am puzzled why your local oscillator is a square wave. It seems to me that the product of your incoming 20 MHz sinusoidal signal and a 20 MHz square wave will produce all sorts of unwanted spectral harmonics. Do you have one or two local oscillators? How do you produce an in-phase (I) signal and a separate quadrature phase (Q) signal? How many ADCs do you have? You are not adding the I signal to the Q signal, are you?

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Reply by shafie7February 6, 2019

Hello Sudarshan,

I agree with Rick regarding more clarifications of the problem statement.

In spite of that, let me makes some assumptions based on what may be the problem.

S1) The jitter level that is stated, “of the order of femto seconds”, is inversely related to the signal of interest BW. That implies BW = ~10^15 Hz, which is your concern “sampling rate required will be too high”.

S2) Broadband application BW that comes to mind is in order of GHz. These applications utilize OFDMA, therefore there are multi-carrier based. Depending on the number of subcarriers and specific application, the larger BW is reduced to couple of 100KHz via multicarriers. Consequently, it relaxes the requirement for jitter analysis.

S3) Let’s assume the required jitter is “of the order of femto seconds”, that implies phase noise of better than ~-300dBc. If so, you cannot down sample it and expect to get any meaningful information out of the down sampled signal, except for some special cases, even so, with some limitations.

Best regards,

Shahram Shafie

https://ortenga.com/