Praveen Raghavan (@praveenraghavan)
SDR: Does it makes sense? Part 1/2
Howdie all,
One of the things I personaly have been debating is SDR ready for deployment? Plenty of companies have come around with commericial solutions like Silicon Hive, NXP (former Philips), Infineon, Sandbridge, and others. For the un-initiated, SDR is the basic idea of if many wireless standards on a single chip.
One of the reasons I strongly believe it may just work is the following: 45nm node is most probably going to be still bulk-CMOS based. 32nm or 22nm technology is...
TI goes the Open Source way!
Hello all,
Most of you probably know about Google's Summer of Code project. One of the great things that came out of that project is TI deciding to give out their compiler for free.
This is an important first step to getting open source codecs running on the DSP of the OSD, as well as for other projects which make use of TI's DM320 or other products containing a c54x DSP. Unfortunately this is not the complete CCS environment, but a standalone compiler. It contains the compiler, optimizer,...
ES Week Emphasis on Component Based Design
Howdy everyone from beautiful Salzburg/Austria,
A week full of presentations on embedded systems at ESWeek was quite a mindful. Similar to most academic conferences, there was only a few papers worth taking back home to think about. Amongst these were:
1. Keynote talk by Hermann Eul from Infineon: He presented Infineon's view on SDR and its evolution. This talk was quite inspirational. However the most interesting slide on complexity of SDR evolution was removed. I wish I could give this...
Software Defined Radio at SAMOS
Lets start off with so 'hot' SDR track held at SAMOS conference this year. The academic community relatively active in the SDR architecture domain including UMich, WisMad, Linkoping, IMEC and others all presented their views on Software Defined Radio and unveiled a part of their work. We from IMEC 'finally' made our SyncPro architecture public. You can find more about our vector synchronization processor architecture from our
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