DSPRelated.com

Tim Burnett (@timburnett)

Electronics design engineer in the aviation sector of Garmin, with focus on FPGA/DSP. Previously an electronics design engineer for the Navy at NUWC-Keyport, with a duties from schematic/pcb design to software development to ATE standup.

Re: Software oscilloscope

Reply posted 4 years ago (06/12/2020)
a) Double buffer.b) I think it would be more robust for the SL to handle the pre-trigger vs. post-trigger storage difference, and for the FL to just move samples...
Having the analog bandwidth much higher than the maximum sample rate allows the sampling converter to undersample high frequency signals. For example, lets say...

Re: Guaranteed stable sliding Goertzel implementation

Reply posted 5 years ago (12/02/2019)
Can you elaborate on your preferred approach to the "I/Q" demodulation step" you refer to? I'm looking for more elegant ways to perform that step than what I've...
I have used a McASP before, but not on that particular processor. McASPs are extremely configurable, and I found I had to play with the settings quite a bit in order...
Are you trying to scale the different pass band frequencies differently (1), or just normalize the pass band gain for all frequencies (2)? If the answer is (2),...

Re: Generating Sine wave in C and Pwelch Plot

Reply posted 5 years ago (08/09/2019)
Try these changes:1. theta       = 2.0*pi*sine_freq*(double)i*samp_time; Note that nothing was in degrees to begin with, so the multiplication by pi/180 was...
In my opinion phase shift (or phase separation of various frequency components) is not very critical when it comes to voice audio quality. Either FIR or IIR can...

Re: Down sampling an iq signal

Reply posted 6 years ago (10/04/2018)
Aliasing (higher frequency signals appearing at lower frequencies, potentially on top of signals already at those frequencies) will still occur with IQ downsampling....

Re: Looking for tips to improve SNR

Reply posted 7 years ago (01/22/2018)
Also, I wanted to double check that you are digitally or analog mixing down to zero-IF? If your IF going into the modulator is higher then I'd recommend trying a...

Re: Looking for tips to improve SNR

Reply posted 7 years ago (01/22/2018)
When the SNR is low, where is all the undesirable energy? Is there a flat noise floor that is coming up, or are there specific tones coming from your demodulation...
The first thing I would try would be goertzel/FFT bin detection of the ring frequency (correlation would probably work too). This is a pretty active site, so I'm...

Re: IIR filters

Reply posted 7 years ago (11/29/2017)
I use higher order Chebyshev and Elliptic IIR filters, and just split them up into biquad sections. My understanding is that higher order filters in a single section...

Re: IIR in FPGA

Reply posted 7 years ago (11/16/2017)
It should be synthesizable. The real format operations are all performed on constants. Every synthesis tool I've worked with recently is smart enough to perform...

Re: IIR in FPGA

Reply posted 7 years ago (11/14/2017)
I see now why you appear to be truncating in your feedback path, that makes sense now. I did some quick edits on your file as follows:1. If you are using numeric_std,...

Re: IIR in FPGA

Reply posted 7 years ago (11/10/2017)
Some general and specific thoughts, from someone who has implemented many IIR filters on FPGA:iir_biquad version (I realize you didn't write it, but I'll make a...

Re: Digital Modulation Methods

Reply posted 7 years ago (10/22/2017)
I'm certainly not an expert on this, but maybe I can shed some light. BTW I apologize if I misinterpret your question. You notice that the values in your constellation...

Use this form to contact timburnett

Before you can contact a member of the *Related Sites:

  • You must be logged in (register here)
  • You must confirm you email address