Reply by Jeff Brower May 3, 20112011-05-03
Duncan-

> The LCD i am using is a KS0108B based Graphic. I am interfacing
> with the KS0108B controller and am using all pins. From what i
> can see the datasheet for the module (KS018B and LCD as one) is
> showing 0.7*5v is required, and the output from the DSK is 3.3v
> max. I have ordered some HEF4014BP 3/5v translators to resolve
> this issue, so hope to try then tonight/tomorrow.

Gotta use some engineering common sense here. Just because your LCD is a "module"
doesn't mean you can ignore its internal architecture. Since the KS0108B controller
is widely used and well-documented, that's the data sheet I would go by. And it says
that digital interface input signals can be 2.0V minimum (except for the ones I
listed, and for some reason you're ignoring in this discussion).

Is there a data sheet for your "Graphic" module? What is the part number?

> >200mm is about 8" -- that is *long* for an async EMIF interface. I assume
> >you're not using a Mictor type ribbon cable
>
> i am using ribbon cable - mictor type, do you think this is a
> problem? the communciations is going to be relatively slow for
> the trial, so don't think it will effect it.

Mictor will help a lot. Although your data rate is slow, suggest to carefully check
slew rate and ringing. One thing to watch for are slow rise times, for example /AWE
rise-time (when your LCD latches input data). If that does not meet the timing spec
in the KS0108B module data sheet, it might explain the cause of your results so far.

> >If that's accurate, I would think you should stay under 25 MHz for
> >8". What's your ECLKOUT rate?
>
> I am not using the ECLKOUT as the deivice has its own clock so does
> not require one. The timing of the signals are done in to he DSK
> using the internal, to suit the LCD minimum timing requirments

Ok.

> >What EMIF control register settings do you have for setup time,
> hold->time, etc?
> v Using CE2 register and timings to really used as async device
> and dont need clock signals.

I was referring to EMIF async register timing values such as strobe width and
hold-off time... in the old days they called this "wait states" and "minimum access
time" (or similar). I don't recall the exact EMIF register bit field names, but they
do need to be set correctly.

> so i the funky reason is going to need me to use the translators 3-5v.

I suggest not to worry about translators until you verify your signal integrity and
timing. Otherwise you may be making extra work for yourself.

-Jeff

_____________________________________
Reply by mill...@btinternet.com May 3, 20112011-05-03
Hello Mike, Jeff.

The LCD i am using is a KS0108B based Graphic. I am interfacing with the KS0108B controller and am using all pins. From what i can see the datasheet for the module (KS018B and LCD as one) is showing 0.7*5v is required, and the output from the DSK is 3.3v max. I have ordered some HEF4014BP 3/5v translators to resolve this issue, so hope to try then tonight/tomorrow.

>200mm is about 8" -- that is *long* for an async EMIF interface. I assume
>you're not using a Mictor type ribbon cable

i am using ribbon cable - mictor type, do you think this is a problem? the communciations is going to be relatively slow for the trial, so don't think it will effect it.

>If that's accurate, I would think you should stay under 25 MHz for
>8". What's your ECLKOUT rate?

I am not using the ECLKOUT as the deivice has its own clock so does not require one. The timing of the signals are done in to he DSK using the internal, to suit the LCD minimum timing requirments

>What EMIF control register settings do you have for setup time, hold->time, etc?
v Using CE2 register and timings to really used as async device and dont need clock signals.

so i the funky reason is going to need me to use the translators 3-5v.

Will keep posted on how i get on.
thanks
duncan

_____________________________________
Reply by Jeff Brower April 28, 20112011-04-28
Duncan-

> The LCD specific datasheet shows minimum of 0.7Vdd which
> is 3.5v.

First your DSK signals don't connect to the LCD, they connect to the KS0108B. This is a controller chip, so it should
handle the LCD side. My understanding is you only need to worry about the "host side" (i.e. DSK daughtercard
interface in this case).

Second the data sheet shows most inputs -- including host interface signals -- as 2V minimum, and a few at 3.5V
(0.7Vdd). The 3.5V signals are CL, FRM, M, RSTB, CLK1, CLK2 -- how many of these are you using?

> Yes i am supplying the LCD module 5v Vdd and i
> obtain this from the DSK board, pins 2 and 80 of the
> daughter card connector.

Ok.

> i use a breakout connector from kane computing and
> connect via short length 200mm of ribbon cable.

200mm is about 8" -- that is *long* for an async EMIF interface. I assume you're not using a Mictor type ribbon cable
(individually shielded conductors), and also it's not a high density ribbon cable with every other conductor tied to
gnd. If that's accurate, I would think you should stay under 25 MHz for 8". What's your ECLKOUT rate? What EMIF
control register settings do you have for setup time, hold-time, etc?

-Jeff

> Mike
>
> i checked the voltage requirments when i started the interface, but was a little unsure about the LCD at the time. i
> also checked about a buffer, and checked the schematics for the DSK and they have a logic transiever fitted. Also in
> one of my previous posts, you said they already have then fitted and should not need a buffer unless a "funky" reason
> for it.
>>As far as I know, there are 2 basic ways of getting off of this list.
>>1. User request or 'unsubscribe'.
>>2. Getting kicked off for blatant inappropriate content.
>
> - i said i dont't want to be removed- it was a little joke!!!!!!
>
> thanks once again
> duncan.

_____________________________________
Reply by mikedunn April 27, 20112011-04-27
Duncan,
On 4/27/2011 5:34 PM, m...@btinternet.com wrote:
>
> Thanks for the replies.
> Jeff
> The LCD specific datasheet shows minimum of 0.7Vdd which is 3.5v. Yes
> i am supplying the LCD module 5v Vdd and i obtain this from the DSK
> board, pins 2 and 80 of the daughter card connector.
>

Make sure that you do not overload the DSK 5v supply.

> i use a breakout connector from kane computing and connect via short
> length 200mm of ribbon cable.
>
> Mike
>
> i checked the voltage requirments when i started the interface, but
> was a little unsure about the LCD at the time. i also checked about a
> buffer, and checked the schematics for the DSK and they have a logic
> transiever fitted. Also in one of my previous posts, you said they
> already have then fitted and should not need a buffer unless a "funky"
> reason for it.
>

The "funky" reason would be to convert DSK 3.3v signals to LCD 5v
signals. You will nee some form of buffer/voltage translator for the
interface.

mikedunn
> >As far as I know, there are 2 basic ways of getting off of this list.
> >1. User request or 'unsubscribe'.
> >2. Getting kicked off for blatant inappropriate content.
>
> - i said i dont't want to be removed- it was a little joke!!!!!!
>
> thanks once again
> duncan.
Reply by mill...@btinternet.com April 27, 20112011-04-27
Thanks for the replies.
Jeff
The LCD specific datasheet shows minimum of 0.7Vdd which is 3.5v. Yes i am supplying the LCD module 5v Vdd and i obtain this from the DSK board, pins 2 and 80 of the daughter card connector. i use a breakout connector from kane computing and connect via short length 200mm of ribbon cable.

Mike

i checked the voltage requirments when i started the interface, but was a little unsure about the LCD at the time. i also checked about a buffer, and checked the schematics for the DSK and they have a logic transiever fitted. Also in one of my previous posts, you said they already have then fitted and should not need a buffer unless a "funky" reason for it.
>As far as I know, there are 2 basic ways of getting off of this list.
>1. User request or 'unsubscribe'.
>2. Getting kicked off for blatant inappropriate content.

- i said i dont't want to be removed- it was a little joke!!!!!!

thanks once again
duncan.

_____________________________________
Reply by Jeff Brower April 27, 20112011-04-27
Duncan-

> Just a quick update from my project.
>
> I have managed to interface the LCD to my DSK board. i have
> completed the connection for the data to LCD - 16bit wide,
> using 8 data and 6 control.
> I think i was expecting it to be harder than it actally was.
> Ignoring all clock controls (as it does not require clock
> from main DSK to LCD as asynchronous with no clock ) i
> connected up and found the control being avaiable of the EMIF
> connection. Did not need to link out pins 75 etc. it worked
> without (pins not avaiable anyway)!
>
> The LCD connected is just and LCD with KS0108B controllers
> and not a built daughter card.
>
> So currently at the stage where i have data avaiable,
> however have now issues with the LCD, think it is faulty.
> Waiting for delivery of new one.
> One thing i have noticed, is that the output is 3.2v per
> data pin, but LCD required 3.5v minimum. What voltage would
> you expect from the DSK? do you think it will be a problem?

First, where do you see 3.5V? The KS0108B data sheet says the minimum input signal voltage is 2V. Second, are you
giving the KS0108B 5V for Vdd?, as specified in the data sheet? If so from where are you getting this voltage?

Also if you don't have a daughtercard, then how did you connect to the LCD + controller? With fine-pitch ribbon
cable? If so how long is that?

-Jeff

> PS DON'T remove me from this group, even though i am close to completion, i have enjoyed the experience and would like
> to keep a hand in as a hobby!!
> :-)
> duncan.

_____________________________________
Reply by mikedunn April 26, 20112011-04-26
Congrats Duncan!
On 4/26/2011 4:50 PM, m...@btinternet.com wrote:
>
> Hello all.
>
> Just a quick update from my project.
>
> I have managed to interface the LCD to my DSK board. i have completed
> the connection for the data to LCD - 16bit wide, using 8 data and 6
> control.
> I think i was expecting it to be harder than it actally was. Ignoring
> all clock controls (as it does not require clock from main DSK to LCD
> as asynchronous with no clock ) i connected up and found the control
> being avaiable of the EMIF connection. Did not need to link out pins
> 75 etc. it worked without (pins not avaiable anyway)!
>
> The LCD connected is just and LCD with KS0108B controllers and not a
> built daughter card.
>
> So currently at the stage where i have data avaiable, however have now
> issues with the LCD, think it is faulty. Waiting for delivery of new one.
> One thing i have noticed, is that the output is 3.2v per data pin, but
> LCD required 3.5v minimum. What voltage would you expect from the DSK?
>

The DSK IF is 3.3 MAX. I *think* that the buffers will tolerate higher
voltage input.
>
> do you think it will be a problem?
>

You should always operate devices within their specified tolerances if
you want correct functionality and reliability.
Normally this would be caught during the design phase [but most of us
have made mistakes/oversights in our past].

For a school project you might try it. But be prepared to insert a
buffer between the DSK and LCD.
> Thanks for your help so far, much appreciated.
>
> PS DON'T remove me from this group, even though i am close to
> completion, i have enjoyed the experience and would like to keep a
> hand in as a hobby!!
> :-)
>

As far as I know, there are 2 basic ways of getting off of this list.
1. User request or 'unsubscribe'.
2. Getting kicked off for blatant inappropriate content.

mikedunn
>
> duncan.
Reply by mill...@btinternet.com April 26, 20112011-04-26
Hello all.

Just a quick update from my project.

I have managed to interface the LCD to my DSK board. i have completed the connection for the data to LCD - 16bit wide, using 8 data and 6 control.
I think i was expecting it to be harder than it actally was. Ignoring all clock controls (as it does not require clock from main DSK to LCD as asynchronous with no clock ) i connected up and found the control being avaiable of the EMIF connection. Did not need to link out pins 75 etc. it worked without (pins not avaiable anyway)!

The LCD connected is just and LCD with KS0108B controllers and not a built daughter card.

So currently at the stage where i have data avaiable, however have now issues with the LCD, think it is faulty. Waiting for delivery of new one.
One thing i have noticed, is that the output is 3.2v per data pin, but LCD required 3.5v minimum. What voltage would you expect from the DSK? do you think it will be a problem?

Thanks for your help so far, much appreciated.

PS DON'T remove me from this group, even though i am close to completion, i have enjoyed the experience and would like to keep a hand in as a hobby!!
:-)
duncan.

_____________________________________
Reply by Jeff Brower April 19, 20112011-04-19
Duncan-

> i have both ralf's books and first one does not have as much about interfacing with EMIF.
> Whilst setting up the emif, it mentions on the TI documentation to set clock out2 to ecklin, by just bridging the
> connection, but again unless the the names are different on the schematics, the clock out 2 does not seem available,
> the docuemt was also specific to the c6711.

I suggest to stop worrying about C6711 vs. C6713 board comparisons and focus on what you need to get the job done. On
the C6711 DSK board, ECLKIN is 100 MHz and CLKIN is 150 MHz. Is that not what you want? If not, what rate do you
want for ECLKIN?

Also, C6711 output ECLKOUT is run to a buffer and produces DB_ECLKOUT (J3-78). If you want to use CLKOUT2 instead (as
Chassaing appears to suggest), it looks like U13 has a couple of unused gates, so you could run a jumper wire from TP2
to J3-78 (lift the pin first) or leave 78 alone and use a different J3 pin.

Again, what actual EMIF clock rate do you need to end up with on the daughtercard?

-Jeff
> with reference to Jeff's reply.
>
> the difference in connectors seems substantial. Since this post i have continued with my development with the EMIf. i
> am trying to set up as async sram. so i am just setting this up. i have checked over the schematics and the two board
> seem different in the follwouing ways.The 6713 has the pin 75 on j3 which is the DC_det which is not on the c6711.
> from what i can see, if i set this up as a 16 bit async memory, use the first 8 bits as data and the rest as the
> control then this will work? In the Ralf chassing book, he talks about needing to ground this terminal 75, so the
> correct voltage is avaialble at the data pins, but dont understand why i would need to.
>
> i have both ralf's books and first one does not have as much about interfacing with EMIF.
> Whilst setting up the emif, it mentions on the TI documentation to set clock out2 to ecklin, by just bridging the
> connection, but again unless the the names are different on the schematics, the clock out 2 does not seem available,
> the docuemt was also specific to the c6711.
>
> i plan to test the connection using a digital storage scope, and should be able to get some data bits configured,
> should i see a voltage on each pin, if set up as memory, 3.3v?
>
> Richard - the sample rate, in my understanding is set by the timer PRD value, is that correct, the program does
> function, and since the listed code i have restructed and does function. unformtunately due to version issues, i used
> c code opposed to libraries,
>
> thanks for all the assistance once again.
>
> duncan
>
> thanks
> duncan
>
> Hello all once again.
>>
>>from my previous post a few months ago, i have progressed my audio spectrum analyser ( this is for my Degree
>> project). I am at the stage where i have got an audio signal sampled, buffered and started on my FFT routine. I have
>> decided to use the Raddix 2 DIT routine. I have got the stage where i have calculated twiddle factors, bit reversal
>> index and sampled the audio signal. Now trying to implement the TI c routine for radix 2 FFT. Due to version of CCS i
>> am unable to use the libraries so have used just the C version of the code from the comments section. When i come to
>> add this c code, it will compile and download, when switched to run on CCS, the program freezes and will not run.
>> Most of the time CCS will crash aswell and ask to rest the board. If i remove the FFT routine then the rest of the
>> code will run ok. Sometimes with the FFT routine it will run once through, but then will not. ( i am monitoring the
>> output signal to a set of speakers as well.)
>>
>>In the comments it mentions using seperate memory banks to store the data and factors, i have also read this on a
>> post on this site, but am usure how to do this, please can you advise. I am using C6711GFN on the DSP starter kit
>> and PCM3003 audio daughter card.
>>
>>I have also attached below a copy of my code, to assist with my issue.
>>
>>So to recap my questions are :
>>1.how do i specify different memory banks to store the data.
>>2. Is my code crashing due to the memory banks issue or the loction of the call, if not any other ideas?
>>3. Any comment that can assit me in my code development.
>>
>>I thank you in advance for your assistance and is much appreciated.
>>
>>duncan
>>
>>/*************************************************************************
>> * Includes *
>> *************************************************************************/
>>
>>#include
>>#include
>>#include
>>#include
>>#include
>>#include
>>#include
>>#include
>>#include
>>
>>#define N 128 //number of FFT points
>>#define ARGU (2*PI)/N //argument for sine/cosine
>>#define PI 3.14159265358979 //definition of value of Pi.
>>short i = 0;
>>typedef struct Complex_tag {float re,im;}Complex;
>>Complex W[N/2]; //array for twiddle constants
>>#define RADIX 2
>>short iTwid[N/2]; //index for twiddle constants W
>>short iData[N]; //index for bitrev X
>>float Xmag[N]; //magnitude spectrum of x
>>Complex x[N]; //N complex data values
>>
>>#pragma DATA_ALIGN(W,sizeof(Complex)) //align W on boundary
>>#pragma DATA_ALIGN(x,sizeof(Complex)) //align input x on boundary
>>
>>static short index =0;
>>int Sample_Data;
>>short *output;
>>short *input;
>>short *interm;
>>short *Ptr; //this pointer is the one used for the processing
>>
>>MCBSP_Handle hMcbsp; // Handle for McBSP
>>TIMER_Handle hTimer; // Handle for Timer
>>
>>void hookint(void);
>>void wait_buffer(void);
>>interrupt void serialPortRcvISR(void);
>>
>>int main()
>>{
>>
>>/*************************************************************************
>> * McBSP configureation - 32bit read and writewords *
>> *************************************************************************/
>>
>> MCBSP_Config PCM3003Cfg = {
>> 0x00010001, // (SPCR) Serial port control register
>> 0x000000A0, // (RCR) Receive control register
>> 0x000000A0, // (XCR) Transmit control registe
>> 0x00000000, // (SRGR)
>> 0x00000000, // (MCR)
>> 0x00000000, // (RCER)
>> 0x00000000, // (XCER)
>> 0x00000000 // (PCR)
>> };
>>
>>/*************************************************************************
>> * Timer configureation - *
>> *************************************************************************/
>>
>> TIMER_Config timerCfg = {
>> 0x000003C1, // (CTL)Internal clk. Clk mode
>> 0x00000000, // (PRD)fs = 73.242Khz
>> 0x00000000 // (CNT)
>> };
>>
>>/*************************************************************************
>> * Board and chip support libraries initilized *
>> *************************************************************************/
>> CSL_init(); // Initialize the chip support library
>> BSL_init(); // Initialize the board support library
>>
>> input = (short *) calloc(N, sizeof(short));
>> output = (short *) calloc(N, sizeof(short));
>> interm = (short *) calloc(N, sizeof(short));
>>
>> hMcbsp = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET); // Opens + reset
>> if (hMcbsp ==INV){ // If hMcbsp in fault, LED 1 is on
>> LED_on(LED_1);
>> }
>>
>> MCBSP_config(hMcbsp, &PCM3003Cfg); // Configures McBSP
>>
>> hTimer = TIMER_open(TIMER_DEV0, TIMER_OPEN_RESET);
>> if (hTimer ==INV){
>> LED_on(LED_2);
>> }
>> TIMER_config(hTimer, &timerCfg);
>>
>> IRQ_globalDisable(); // Globally disables interrupts
>> IRQ_nmiEnable(); // Enables the NMI interrupt
>> IRQ_map(IRQ_EVT_RINT1,15); // Maps an event
>> IRQ_enable(IRQ_EVT_RINT1); // Enables the event
>> IRQ_globalEnable(); // Globally enables interrupts
>>
>>/*************************************************************************
>> * Twiddle factor generation, Reverse Index and Bit reverse blocks *
>> *************************************************************************/
>> for( i = 0 ; i < N/2 ; i++ )
>> {
>> W[i].re = cos(ARGU*i); //real component of W
>> W[i].im = sin(ARGU*i); //neg imag component
>> }
>>
>>digitrev_index(iTwid, N/RADIX, RADIX); //produces index for bitrev() W
>>bit_rev(W, iTwid, N/RADIX); //bit reverse W
>>digitrev_index(iData, N, RADIX); //produces index for bitrev() X
>>
>>for(i=0; i
>
_____________________________________
Reply by Richard Williams April 18, 20112011-04-18
Mills,

pin 75 (of the 6713 DSP) is the EMIF interface enable pin.
That is why that pin on the DSP has to be grounded.
Both devices have a pin named 'AOE/SDRAS/SSOE' (which might not be connected to
the same pin on a Jx connector on some evaluation board.)

That is the signal that has to be set to ground (it is DSP pin 75 on the 6713).

This fact is made very clear on the second version of the Chassing book.
(I have not read the first version of the book)
Therefore, look at the signal pins on the DSP and where they are brought out
onto the connectors.
This does NOT necessarily mean to look at pin 75 on some connector.

R. Williams
---------- Original Message -----------
From: m...@btinternet.com
To: c...
Sent: Sat, 16 Apr 2011 14:33:59 -0400
Subject: [c6x] Re: spectrum analyser project.

> Hello all.
>
> with reference to Jeff's reply.
>
> the difference in connectors seems substantial. Since this post i have
> continued with my development with the EMIf. i am trying to set up as
> async sram. so i am just setting this up. i have checked over the
> schematics and the two board seem different in the follwouing ways.The
> 6713 has the pin 75 on j3 which is the DC_det which is not on the
> c6711. from what i can see, if i set this up as a 16 bit async memory,
> use the first 8 bits as data and the rest as the control then this
> will work? In the Ralf chassing book, he talks about needing to ground
> this terminal 75, so the correct voltage is avaialble at the data pins,
> but dont understand why i would need to.
>
> i have both ralf's books and first one does not have as much about
> interfacing with EMIF. Whilst setting up the emif, it mentions on the
> TI documentation to set clock out2 to ecklin, by just bridging the
> connection, but again unless the the names are different on the
> schematics, the clock out 2 does not seem available, the docuemt was
> also specific to the c6711.
>
> i plan to test the connection using a digital storage scope, and
> should be able to get some data bits configured, should i see a
> voltage on each pin, if set up as memory, 3.3v?
>
> Richard - the sample rate, in my understanding is set by the timer PRD
> value, is that correct, the program does function, and since the
> listed code i have restructed and does function. unformtunately due to
> version issues, i used c code opposed to libraries,
>
> thanks for all the assistance once again.
>
> duncan
>
> thanks
> duncan
>
> Hello all once again.
> >
> >from my previous post a few months ago, i have progressed my audio spectrum
analyser ( this is for my Degree project). I am at the stage where i have got an
audio signal sampled, buffered and started on my FFT routine. I have decided to
use the Raddix 2 DIT routine. I have got the stage where i have calculated
twiddle factors, bit reversal index and sampled the audio signal. Now trying to
implement the TI c routine for radix 2 FFT. Due to version of CCS i am unable to
use the libraries so have used just the C version of the code from the comments
section. When i come to add this c code, it will compile and download, when
switched to run on CCS, the program freezes and will not run. Most of the time
CCS will crash aswell and ask to rest the board. If i remove the FFT routine
then the rest of the code will run ok. Sometimes with the FFT routine it will
run once through, but then will not. ( i am monitoring the output signal to a
set of speakers as well.)
> >
> >In the comments it mentions using seperate memory banks to store the data and
factors, i have also read this on a post on this site, but am usure how to do
this, please can you advise. I am using C6711GFN on the DSP starter kit and
PCM3003 audio daughter card.
> >
> >I have also attached below a copy of my code, to assist with my issue.
> >
> >So to recap my questions are :
> >1.how do i specify different memory banks to store the data.
> >2. Is my code crashing due to the memory banks issue or the loction of the
call, if not any other ideas?
> >3. Any comment that can assit me in my code development.
> >
> >I thank you in advance for your assistance and is much appreciated.
> >
> >duncan
> >
> >/*************************************************************************
> > * Includes *
> > *************************************************************************/
> >
> >#include
> >#include
> >#include
> >#include
> >#include
> >#include
> >#include
> >#include
> >#include
> >
> >#define N 128 //number of FFT points
> >#define ARGU (2*PI)/N //argument for sine/cosine
> >#define PI 3.14159265358979 //definition of value of Pi.
> >short i = 0;
> >typedef struct Complex_tag {float re,im;}Complex;
> >Complex W[N/2]; //array for twiddle constants
> >#define RADIX 2
> >short iTwid[N/2]; //index for twiddle constants W
> >short iData[N]; //index for bitrev X
> >float Xmag[N]; //magnitude spectrum of x
> >Complex x[N]; //N complex data values
> >
> >#pragma DATA_ALIGN(W,sizeof(Complex)) //align W on boundary
> >#pragma DATA_ALIGN(x,sizeof(Complex)) //align input x on boundary
> >
> >static short index =0;
> >int Sample_Data;
> >short *output;
> >short *input;
> >short *interm;
> >short *Ptr; //this pointer is the one used for the processing
> >
> >MCBSP_Handle hMcbsp; // Handle for McBSP
> >TIMER_Handle hTimer; // Handle for Timer
> >
> >void hookint(void);
> >void wait_buffer(void);
> >interrupt void serialPortRcvISR(void);
> >
> >int main()
> >{
> >
> >/*************************************************************************
> > * McBSP configureation - 32bit read and writewords *
> > *************************************************************************/
> >
> > MCBSP_Config PCM3003Cfg = {
> > 0x00010001, // (SPCR) Serial port control register
> > 0x000000A0, // (RCR) Receive control register
> > 0x000000A0, // (XCR) Transmit control registe
> > 0x00000000, // (SRGR)
> > 0x00000000, // (MCR)
> > 0x00000000, // (RCER)
> > 0x00000000, // (XCER)
> > 0x00000000 // (PCR)
> > };
> >
> >/*************************************************************************
> > * Timer configureation - *
> > *************************************************************************/
> >
> > TIMER_Config timerCfg = {
> > 0x000003C1, // (CTL)Internal clk. Clk mode
> > 0x00000000, // (PRD)fs = 73.242Khz
> > 0x00000000 // (CNT)
> > };
> >
> >/*************************************************************************
> > * Board and chip support libraries initilized *
> > *************************************************************************/
> > CSL_init(); // Initialize the chip support library
> > BSL_init(); // Initialize the board support library
> >
> > input = (short *) calloc(N, sizeof(short));
> > output = (short *) calloc(N, sizeof(short));
> > interm = (short *) calloc(N, sizeof(short));
> >
> > hMcbsp = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET); // Opens + reset
> > if (hMcbsp ==INV){ // If hMcbsp in fault, LED 1 is on
> > LED_on(LED_1);
> > }
> >
> > MCBSP_config(hMcbsp, &PCM3003Cfg); // Configures McBSP
> >
> > hTimer = TIMER_open(TIMER_DEV0, TIMER_OPEN_RESET);
> > if (hTimer ==INV){
> > LED_on(LED_2);
> > }
> > TIMER_config(hTimer, &timerCfg);
> >
> > IRQ_globalDisable(); // Globally disables interrupts
> > IRQ_nmiEnable(); // Enables the NMI interrupt
> > IRQ_map(IRQ_EVT_RINT1,15); // Maps an event
> > IRQ_enable(IRQ_EVT_RINT1); // Enables the event
> > IRQ_globalEnable(); // Globally enables interrupts
> >
> >/*************************************************************************
> > * Twiddle factor generation, Reverse Index and Bit reverse blocks *
> > *************************************************************************/
> > for( i = 0 ; i < N/2 ; i++ )
> > {
> > W[i].re = cos(ARGU*i); //real component of W
> > W[i].im = sin(ARGU*i); //neg imag component
> > }
> >
> >digitrev_index(iTwid, N/RADIX, RADIX); //produces index for bitrev() W
> >bit_rev(W, iTwid, N/RADIX); //bit reverse W
> >digitrev_index(iData, N, RADIX); //produces index for bitrev() X
> >
> >for(i=0; i
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