Hi Gospelkrishna,
the '72x SHI in interface is configured to I2C in the same way as the
'3xx. The names for registers and bits have to be defined.
; define SHI register equates
HCKR equ $FFFF90 ; SHI Clock Control Register.
HCSR equ $FFFF91 ; SHI Control/Status Register.
HRX equ $FFFF94 ; SHI Receive Data FIFO
HTX equ $FFFF93 ; SHI Transmit Data Register
HBUSY equ 22 ; I2C Bus busy status bit
HBER equ 21 ; I2C Bus error status bit
HTDE equ 15 ; Transmit regsiter empty status bit
HIDLE equ 9 ; I2C master bus idle status bit
HRNE equ 17 ; Receive register not empty status bit
During the initialization the SHI interface is configured for I2C:
; Do this during initialization to adjust I2C
ori #$03,mr ; guarantee that interrupts are masked
movep #$0,X:HCSR ; turn off/reset SHI
;*** Set SHI clock Rate ***
movep #$000040,X:HCKR ; /64 for crystal value (i.e. 25MHz/(8*8) = 390625
;*** Setup SHI: Master Mode, 8 bit data, I2C protocol ***
movep #$008242,X:HCSR ; write register leaving SHI disabled...
bset #0,x:HCSR ; enable the SHI after register programmed...
During program runtime you may use a subroutine like this:
; During program runtime you can write to I2C
;*** SHI TX routine
; r0: contains data to write
SHI_tx:
movep r0,x:HTX ; write data to SHI TX register
rep #3
nop ; nops for latency in status bits updating
brclr #HTDE,X:HCSR,* ; Wait for HTX register to empty
rts ; and then return
To read the I2C you have to write a 'read instruction' (This example
is for reading an ST M24M01 EEPROM - communication to a PIC should be much
simpler):
;*********************************************************************
;*** Read a random byte from EEPROM
; EEPROM requires an incomplete write cycle to update the internal
; address pointer followed by a read. Inefficient but it works...
; x0: returns byte to write in upper 8-bits
; r1: contains address to write to in EEPROM
READ_random_byte:
move y0,r0 ; EEPROM slave address with write bit clr
bsr SHI_tx ; write to SHI
move r1,a0 ; move address of interest to a0
asl #8,a,a ; Shift MSB of address into TX position
move a0,r0 ; TX MSByte address
bsr SHI_tx ; write to SHI
asl #8,a,a ; Now get LSB address into position
move a0,r0 ; TX LSByte address
bsr SHI_tx ; write to SHI
bset #HIDLE,x:HCSR ; generate I2C stop event - incomplete write cycle
rep #20 ; wait a bit...
nop
move y1,r0 ; write eeprom slave address, w/read bit set
movep r0,x:HTX ; write data to SHI TX register
bset #HIDLE,x:HCSR ; don't ack rcv'd byte so EEPROM only sends one
byte
nop ; nops for latency in status bits getting updated
nop
nop
brclr #HTDE,X:HCSR,* ; Wait for HTX register to empty
brclr #HRNE,x:HCSR,* ; wait for EEPROM to write byte back
move x:HRX,x0 ; read return value from EEPROM
rts
I've taken these code snippets from a '72x I2C EEPROM programmer code
that is used to write the memory of the '72x daughter cards.
Anyway you may use SHI interrupts for the communication as well. In that case
you have to point the interrupt vectors (see p. 10-5 in the DSP56720 reference
manual you can find here:
http://cache.freescale.com/files/dsp/doc/ref_manual/DSP56720RM.pdf?fpsp=1&WT_TYPE=Reference
Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation ):
Program Address Interrupt Source
VBA:0x0040 SHI Transmit Data
VBA:0x0042 SHI Transmit Underrun Error
VBA:0x0044 SHI Receive FIFO Not Empty
VBA:0x0048 SHI Receive FIFO Full
VBA:0x004A SHI Receive Overrun Error
VBA:0x004C SHI Bus Error
Anyway polling should be easier for the beginning:
Best regards
Christian
Hi,
>
>I am using Free scale DSPA56721 80 pin for one of application using PIC16F886
microcontroller. Now i want to communicate with DSPA56721 from PIC16F886
through I2C protocol. How to configure I2C communication protocol in DSPA56721 ?
and what are all the steps i need to follow ?
>
>Thank you
>Warm Regards,
>
>Gopalkrishna.D | Software Engineer |Wireless and Automotive products