> I don't believe they had a configurable
option for it. Though
> I no longer use it (and I actually don't they are around anymore), but
what
> exactly is the issue with using the IDLE in conjunction with an HPI
> interface? You've got my curiousity up.
In looking at the "TMS320C6000 DSP Power-Down Logic and Modes Reference
Guide"
document (SPRU728B) more closely:
a) HPI should be Ok with IDLE instruction or PD1 power-down mode
b) PD2 and PD3 modes should work Ok on C67xx (what was I thinking before?)
c) in PD2 and PD3 modes the document says that "peripheral operation is
not assured..."
So PD2 and PD3 modes would be the situation where an external processor would
need to
be aware and avoid using HPI.
PD3 completely stops the clock... darn, that sounds good. I need to try that.
I
wouldn't be surprised if the wake-up interrupt has to be level-triggered in
that
state, without a clock handy.
-Jeff
Reply by George Wicks●February 21, 20052005-02-21
Hi Jeff:
I don't believe they had a configurable option for it. Though
I no longer use it (and I actually don't they are around anymore), but
what
exactly is the issue with using the IDLE in conjunction with an HPI
interface? You've got my curiousity up.
- George
>
> George-
> I hope the 3p makes that a configurable RTOS option. What happens for example if an > external processor is using HPI?
>
> -Jeff
>
>
Reply by Jeff Brower●February 21, 20052005-02-21
George-
> Hi Anoop, Bernhard:
>
> From what you said Anoop, what Bernhard is saying <is> probably
> what you want to do, i.e., a SW Reset. The CSL functions can easily
> be used to insure that the processor is in fact brought back to the
> default conditions at reset, and by jumping to 0x00000000, you're
> back at the starting gate.
>
> That said, there is a legitimate reason for using the IDLE instruction.
I've
> seen a third party RTOS's source code where they use it
post-initialization.
> (Can't go into it, because I'm not at liberty to discuss). The
RTOS's task
> scheduler kicks off the first task on it's task list via the TIMER
interrupt
> (Remember, IDLE effectively Halts the CPU <until> an interrupt is
> received), thus the CPU is then no longer sitting there in a halted
state.
> No, this wasn't DSP-BIOS, but I'd guess that they probably do
what I
> just mentioned.
I hope the 3p makes that a configurable RTOS option. What happens for example if
an
external processor is using HPI?
-Jeff
Reply by Jagadeesh Sankaran●February 21, 20052005-02-21
This seems to match my thinking as well. There have been enhancements
by adding PD2 and PD3 specifically for C64xx devices.
Regds
JS
>Jeff Brower wrote:
>
> Jagadeesh-
>
> > If the real reason you want to halt the DSP, is to save power, then a
better
> > way to do it would be to use the power down modes.
>
> For C67xx devices (I believe the original poster was using DSK C6711),
my
> understanding is the IDLE instruction is the same as writing values to the
PWRD field
> in the CSR that cause PD1 power down mode, and PD2 and PD3 modes are not
available.
>
> In PD1, the CPU is halted but clock PLL continues to run.
>
> My conclusion is that for C67xx devices, a) IDLE instruction is as good as
it gets,
> and b) the benefit is not as much as for other C6xxx devices that support
PD2 and
> PD3.
>
> If that's not accurate, please someone correct me.
>
> -Jeff
>
> > -----Original Message-----
> > From: Jeff Brower [mailto:]
> > Sent: Sunday, February 20, 2005 12:18 AM
> > To: Bhooshan Iyer
> > Cc:
> > Subject: Re: [c6x] Re: Halting the DSP
> >
> > Hi Bhooshan-
> >
> > > Isnt IDLE like an infinite "branch to itself", if so
does it really
> > > help save power? Does TI mention anywhere about power savings due
to
> > > IDLE?
> >
> > It does NOPs, which are supposed to save power. Did you know there is
a
> > "TMS320C6000
> > DSP Power-Down Logic and Modes Reference Guide" document? I did
not, but
> > there is,
> > seems like it came out in Aug 2004 and was revised Jan 2005:
> >
> > http://focus.ti.com/lit/ug/spru728b/spru728b.pdf
> >
> > On pg 9:
> >
> > "In addition to power-down modes described in this document,
> > the IDLE instruction provides lower CPU power consumption
> > by executing continuous NOPs. The IDLE instruction terminates
> > only upon servicing an interrupt."
> >
> > How much power is saved by hard-coded NOPs vs. a code loop that does
the
> > same thing?
> > That's not quantified, but I suppose a bit might be saved by not
executing
> > NOPs from
> > P cache, which is a piece of SRAM.
> >
> > -Jeff
> >
> > > On Sat, 19 Feb 2005 10:41:41 -0600, Jeff Brower <>
> > wrote:
> > > >
> > > > Mike-
> > > >
> > > > > 1. there is no functional reason to halt [or try to
halt] a c6000
> > DSP.
> > > >
> > > > Is reducing power consumption a valid reason to make
frequent use of
> > IDLE/interrupt
> > > > combination?
> > > > .
> > > > .
> > > > .
> > > >
> > > > > Of course, if we all add bullet proof hardware and
software, we would
> > > > > not be thinking about reset after power up.
> > > >
> > > > There is always the cosmic ray with the name of your product
on it :-)
> > I know that's
> > > > truly nanoscopic writing not yet developed by mankind, but
it's there.
> > > >
> > > > -Jeff
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
> > > --
> > > -------------------------------
> > > "I've missed more than 9000 shots in my career.
> > > I've lost almost 300 games. 26 times I've been trusted
to take the
> > > game winning shot and missed.
> > > I've failed over and over again in my life.
> > > And that is why I succeed."
> > > -- Michael Jordan
> > > --------------------------------
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
Reply by Jeff Brower●February 21, 20052005-02-21
Mike-
> > > 1. there is no functional reason to halt
[or try to halt] a c6000 DSP.
> > Is reducing power consumption a valid reason
to make frequent use of
> > IDLE/interrupt combination?
> Valid yes, functional no. The idle instruction can
save you power,
> but I know of any functional reason to use it. Maybe I am a bit
> extreme with my meanings... mikedunn
If saving power whenever possible is an application objective, what else can be
done
on the C67xx? I'm not clear on the difference between PD1 mode and IDLE
instruction,
if any. I'm assuming either one consumes less power than a short code loop
that
branches to itself and does NOPs, but how much less power?
-Jeff
Reply by Mike Dunn●February 21, 20052005-02-21
Jeff,
Jeff Brower <j...@signalogic.com>
wrote:
Mike-
> 1. there is no functional reason to halt
[or try to halt] a c6000 DSP.
Is reducing power consumption a valid
reason to make frequent use of IDLE/interrupt combination?
Valid yes, functional
no. The idle instruction can save you power, but I know of any functional
reason to use it. Maybe I am a bit extreme with my meanings...
mikedunn
> Of course, if we all add bullet proof
hardware and software, we would > not be thinking about reset after
power up.
There is always the cosmic ray with the name of your
product on it :-) I know that's truly nanoscopic writing not yet
developed by mankind, but it's there.
I guess that I should
have not been my sarcastic self. For the record, we should always do our
best, within our constraints, to develop hardware and software that is
immune to as many outside influences as possible. After we have done this,
we should assume that the system will fail anyway. At this point we should
decide if we have the need and will to recover from such an error...
mikedunn
-Jeff
Reply by Jeff Brower●February 20, 20052005-02-20
Jagadeesh-
> If the real reason you want to halt the DSP, is to
save power, then a better
> way to do it would be to use the power down modes.
For C67xx devices (I believe the original poster was using DSK C6711), my
understanding is the IDLE instruction is the same as writing values to the PWRD
field
in the CSR that cause PD1 power down mode, and PD2 and PD3 modes are not
available.
In PD1, the CPU is halted but clock PLL continues to run.
My conclusion is that for C67xx devices, a) IDLE instruction is as good as it
gets,
and b) the benefit is not as much as for other C6xxx devices that support PD2
and
PD3.
If that's not accurate, please someone correct me.
-Jeff
> -----Original Message-----
> From: Jeff Brower [mailto:]
> Sent: Sunday, February 20, 2005 12:18 AM
> To: Bhooshan Iyer
> Cc:
> Subject: Re: [c6x] Re: Halting the DSP
>
> Hi Bhooshan-
>
> > Isnt IDLE like an infinite "branch to itself", if so does it
really
> > help save power? Does TI mention anywhere about power savings due
to
> > IDLE?
>
> It does NOPs, which are supposed to save power. Did you know there is a
> "TMS320C6000
> DSP Power-Down Logic and Modes Reference Guide" document? I did not,
but
> there is,
> seems like it came out in Aug 2004 and was revised Jan 2005:
>
> http://focus.ti.com/lit/ug/spru728b/spru728b.pdf
>
> On pg 9:
>
> "In addition to power-down modes described in this document,
> the IDLE instruction provides lower CPU power consumption
> by executing continuous NOPs. The IDLE instruction terminates
> only upon servicing an interrupt."
>
> How much power is saved by hard-coded NOPs vs. a code loop that does the
> same thing?
> That's not quantified, but I suppose a bit might be saved by not
executing
> NOPs from
> P cache, which is a piece of SRAM.
>
> -Jeff
>
> > On Sat, 19 Feb 2005 10:41:41 -0600, Jeff Brower <>
> wrote:
> > >
> > > Mike-
> > >
> > > > 1. there is no functional reason to halt [or try to halt] a
c6000
> DSP.
> > >
> > > Is reducing power consumption a valid reason to make frequent use
of
> IDLE/interrupt
> > > combination?
> > > .
> > > .
> > > .
> > >
> > > > Of course, if we all add bullet proof hardware and software,
we would
> > > > not be thinking about reset after power up.
> > >
> > > There is always the cosmic ray with the name of your product on
it :-)
> I know that's
> > > truly nanoscopic writing not yet developed by mankind, but
it's there.
> > >
> > > -Jeff
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> > --
> > -------------------------------
> > "I've missed more than 9000 shots in my career.
> > I've lost almost 300 games. 26 times I've been trusted to
take the
> > game winning shot and missed.
> > I've failed over and over again in my life.
> > And that is why I succeed."
> > -- Michael Jordan
> > --------------------------------
>
>
Reply by Bhooshan Iyer●February 20, 20052005-02-20
Jeff--
Isnt IDLE like an infinite "branch to itself", if so does it really
help save power? Does TI mention anywhere about power savings due to
IDLE?
--Bhooshan
On Sat, 19 Feb 2005 10:41:41 -0600, Jeff Brower <> wrote: >
> Mike-
>
> > 1. there is no functional reason to halt [or try to halt] a c6000
DSP.
>
> Is reducing power consumption a valid reason to make frequent use of
IDLE/interrupt
> combination?
> .
> .
> .
>
> > Of course, if we all add bullet proof hardware and software, we
would
> > not be thinking about reset after power up.
>
> There is always the cosmic ray with the name of your product on it :-) I
know that's
> truly nanoscopic writing not yet developed by mankind, but it's
there.
>
> -Jeff
--
-------------------------------
"I've missed more than 9000 shots in my career.
I've lost almost 300 games. 26 times I've been trusted to take the
game winning shot and missed.
I've failed over and over again in my life.
And that is why I succeed."
-- Michael Jordan
--------------------------------
Reply by Jeff Brower●February 20, 20052005-02-20
Hi Bhooshan-
> Isnt IDLE like an infinite "branch to
itself", if so does it really
> help save power? Does TI mention anywhere about power savings due to
> IDLE?
It does NOPs, which are supposed to save power. Did you know there is a
"TMS320C6000
DSP Power-Down Logic and Modes Reference Guide" document? I did not, but
there is,
seems like it came out in Aug 2004 and was revised Jan 2005:
"In addition to power-down modes described in this document,
the IDLE instruction provides lower CPU power consumption
by executing continuous NOPs. The IDLE instruction terminates
only upon servicing an interrupt."
How much power is saved by hard-coded NOPs vs. a code loop that does the same
thing?
That's not quantified, but I suppose a bit might be saved by not executing
NOPs from
P cache, which is a piece of SRAM.
-Jeff
> On Sat, 19 Feb 2005 10:41:41 -0600, Jeff Brower
<> wrote:
> >
> > Mike-
> >
> > > 1. there is no functional reason to halt [or try to halt] a c6000
DSP.
> >
> > Is reducing power consumption a valid reason to make frequent use of
IDLE/interrupt
> > combination?
> > .
> > .
> > .
> >
> > > Of course, if we all add bullet proof hardware and software, we
would
> > > not be thinking about reset after power up.
> >
> > There is always the cosmic ray with the name of your product on it :-)
I know that's
> > truly nanoscopic writing not yet developed by mankind, but it's
there.
> >
> > -Jeff
> >
> >
> >
> >
> >
> >
> >
> >
>
> --
> -------------------------------
> "I've missed more than 9000 shots in my career.
> I've lost almost 300 games. 26 times I've been trusted to take
the
> game winning shot and missed.
> I've failed over and over again in my life.
> And that is why I succeed."
> -- Michael Jordan
> --------------------------------
Reply by Jeff Brower●February 19, 20052005-02-19
Mike-
> 1. there is no functional reason to halt [or try
to halt] a c6000 DSP.
Is reducing power consumption a valid reason to make frequent use of
IDLE/interrupt
combination?
.
.
.
> Of course, if we all add bullet proof hardware and
software, we would
> not be thinking about reset after power up.
There is always the cosmic ray with the name of your product on it :-) I know
that's
truly nanoscopic writing not yet developed by mankind, but it's there.