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(@Kamilpl)


Re: Ideas for simple bitrate regulation

Reply posted 7 years ago (02/07/2018)
Here is a block diagram of what I try to implement:                            +-----------------+                            |   ...

Re: Ideas for simple bitrate regulation

Reply posted 7 years ago (02/06/2018)
In my case, I have to keep a 50% duty cycle on data and clock at output. Ratio of channel coding is not 1/2, it would be too easy :)I guess digital PLL is the only...

Ideas for simple bitrate regulation

New thread started 7 years ago
Hello everyone,I would like to implement a bitrate regulation on an fpga board.Clock + data are incoming at bitrate with a +/- percentage. Then after a channel coder...

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