If we can arrange to have
then the filter bank will reduce to the simple system shown in Fig.11.23.
Thus, when and , we have a simple parallelizer/serializer, which is perfect-reconstruction by inspection: Referring to Fig.11.23, think of the input samples as ``filling'' a length delay line over sample clocks. At time 0 , the downsamplers and upsamplers ``fire'', transferring (and zeros) from the delay line to the output delay chain, summing with zeros. Over the next clocks, makes its way toward the output, and zeros fill in behind it in the output delay chain. Simultaneously, the input buffer is being filled with samples of . At time , makes it to the output. At time , the downsamplers ``fire'' again, transferring a length ``buffer'' [ : ] to the upsamplers. On the same clock pulse, the upsamplers also ``fire'', transferring samples to the output delay chain. The bottom-most sample [ ] goes out immediately at time . Over the next sample clocks, the length output buffer will be ``drained'' and refilled by zeros. Simultaneously, the input buffer will be replaced by new samples of . At time , the downsamplers and upsamplers ``fire'', and the process goes on, repeating with period . The output of the -way parallelizer/serializer is therefore
and we have perfect reconstruction.
Sliding Polyphase Filter Bank
Orthogonal Two-Channel Filter Banks