Implementation of a Tx/Rx OFDM System in a FPGA
The aim of this project consists in the FPGA design and implementation of a transmitter and receiver (Tx/Rx) multicarrier system such the Orthogonal Frequency Division Multiplexing (OFDM). This Tx/Rx OFDM subsystem is capable to deal with with different M-QAM modulations and is implemented in a digital signal processor (DSP-FPGA). The implementation of the Tx/Rx subsystem has been carried out in a FPGA using both System Generator visual programming running over Matlab/Simulink, and the Xilinx ISE program which uses VHDL language. This project is divided into four chapters, each one with a concrete objective. The first chapter is a brief introduction to the digital signal processor used, a field-programmable gate array (FPGA), and to the VHDL programming language. The second chapter is an overview on OFDM, its main advantages and disadvantages in front of previous systems, and a brief description of the different blocks composing the OFDM system. Chapter three provides the implementation details for each of these blocks, and also there is a brief explanation on the theory behind each of the OFDM blocks to provide a better comprehension on its implementation. The fourth chapter is focused, on the one hand, in showing the results of the Matlab/Simulink simulations for the different simulation schemes used and, on the other hand, to show the experimental results obtained using the FPGA to generate the OFDM signal at baseband and then upconverted at the frequency of 3,5 GHz. Finally the conclusions regarding the whole Tx/Rx design and implementation of the OFDM subsystem are given.
Summary
This master thesis describes the design and FPGA implementation of an OFDM transmitter and receiver supporting multiple M-QAM constellations. It documents a model-based workflow using MATLAB/Simulink System Generator and a VHDL implementation in Xilinx ISE, focusing on practical issues for real-time communications on FPGA hardware.
Key Takeaways
- Implement a complete OFDM Tx/Rx baseband chain on FPGA using both System Generator and hand-written VHDL.
- Optimize fixed-point arithmetic and word-length choices for M‑QAM modulation to balance performance and resource use.
- Integrate FFT/IFFT processing, cyclic prefix handling, and synchronization techniques required for OFDM systems.
- Evaluate FPGA resource utilization and timing in Xilinx ISE and map functions to BRAM, DSP slices, and logic efficiently.
Who Should Read This
FPGA/DSP engineers or graduate students with experience in digital communications and hardware design who want practical guidance on implementing real-time OFDM transceivers.
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