Twenty-eight years of design engineering in the broadcasting market designing audio and video products for TV, film, and post-production professionals. Programming from 6502s and 56001 DSPs to multi-core processors and Sharcs, board layout from Bishop Graphics tape to many-layer CAD, TTL to Zynq circuit designs, it's been a wild ride.

Unfortunately I'm not a Matlab user so I can't check your code. However, you might want to toss the negative values first before shifting. Your results are exactly...
dudelsound has the right concept. Keep in mind that every bit of your signal is 6dB, and your device will have a dynamic range that defines how many bits are actually...

Re: Communication between ARM and DSP

Reply posted 1 year ago (12/15/2020)
If the DSP can be implemented in firmware blocks there's always the Xilinx Zynq product line.
The Nyquist limit doesn't guarantee reproduction, only the lack of aliasing. Consider a sine wave of 32Hz sampled perfectly synchronously at 64Hz at the zero crossings....

Re: Learning FPGA

Reply posted 3 years ago (10/03/2018)
The learning curve for FPGA design is fairly steep simply because there are so many moving parts to an integrated whole design. FPGA design encompasses hardware,...

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