Reza Ameli (@rameli)

I am an embedded system architect with a keen interest in implementing signal processing systems using FPGAs and processors. To do this full-time, I founded where me and my colleagues help you define, design and test your embedded systems.

Discrete-Time PLLs, Part 1: Basics

Reza Ameli December 1, 20159 comments

Design Files: Part1.slx

Hi everyone,

In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.

In the first part of the series, we will be reviewing the basics of continuous-time baseband PLLs and we will see some useful mathematics that will give us insight into the inners working of PLLs. In the second part, we will focus on...

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