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About rameli

Reza Ameli (@rameli)

I am an embedded system architect with a keen interest in implementing signal processing systems using FPGAs and processors. To do this full-time, I founded complexwave.tech where me and my colleagues help you define, design and test your embedded systems.

Discrete-Time PLLs, Part 1: Basics

Reza Ameli ● December 1, 2015●9 comments

In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.

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