Bryant Sorensen (@bryant_s)

Audio signal processing professional, implementing DSP in ASIP/ASSP (complete design cycle), HW (ASIC or FPGA), FW, or Matlab. Optimization for low power, reduced cycles, and numerical methods to enable algorithms in constrained processing.

Re: DC Blocking unexpected results

Reply posted 5 years ago (08/10/2018)
So, if 407.8 MHz is the 'zero bin', and you have a large negative value in dB at that point - isn't this what you want?  You are putting a notch at that frequency...

Re: DC Blocking unexpected results

Reply posted 5 years ago (08/10/2018)
Tony,Some clarification would help me.  First - you say 'zero bin', but your X labels on the graphs show 405.5 to 410.0.  ???Second - can you give the filter...

Re: Tones in sigma delta modulator and dithering

Reply posted 5 years ago (07/28/2018)
To more directly answer your first questions - you are experiencing idle tones.  These are common in sigma-delta modulators, especially low orders.  This is because...

Re: Low power dsp chip

Reply posted 5 years ago (04/13/2018)
I believe the closest you will come is something from the Ezairo series from ON Semi.  http://www.onsemi.com/PowerSolutions/content.do?id... The question for their...

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