Program failed to load in DDR

Dear friends,
I hv DM648 from Lyrtech having 2 DDR's (128MB each)and I am working on " Hello World " example of NDK1.92. Before execution of code DSP loads the .outfile in DDR2.Recently my program failed to load in DDR with the error of "Data Verification Failed at 0xE00A7114". I wanted to know How DSP dumps or manages Data in DDR, Is it makes sequential allocaion (Fills one then the other) or It makes odd even Page assignments.
According to Schematics all the address/Data and control lines are equally shared among the two DDR's, So the situation is very confusing for me to correctly identify which DDR has gone wrong.

Thanks and Kind Regards
Ahmed

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ahmed,

I would expect the appropriate address line would be used, along with the appropriate
/CS line to select one of the DDRs as the first 128m RAM address space and similar with
the selection of the second 128m RAM address space.

I have not seen your schematics, so cannot give further specifics.

Have you checked that the amount of delay cycles in the accessing of the two DDRs is
adequate for the CPU clock speed?
For the RAM loading to work sometimes and not other times is an indication that the
timing is marginal and/or one of the DDRs is failing.

R. Williams
---------- Original Message -----------
From: a...@yahoo.com
To: c...
Sent: Fri, 20 Aug 2010 14:56:22 -0400
Subject: [c6x] Program failed to load in DDR

> Dear friends,
> I hv DM648 from Lyrtech having 2 DDR's (128MB each)and I
> am working on " Hello World " example of NDK1.92. Before execution of
> code DSP loads the .outfile in DDR2.Recently my program failed to load
> in DDR with the error of "Data Verification Failed at 0xE00A7114". I
> wanted to know How DSP dumps or manages Data in DDR, Is it makes
> sequential allocaion (Fills one then the other) or It makes odd even
> Page assignments. According to Schematics all the
> address/Data and control lines are equally shared among the two DDR's,
> So the situation is very confusing for me to correctly identify which
> DDR has gone wrong.
>
> Thanks and Kind Regards
> Ahmed
------- End of Original Message -------

_____________________________________ Start a New Thread

Ahmed,
On 8/20/2010 1:56 PM, a...@yahoo.com wrote:
>
> Dear friends,
> I hv DM648 from Lyrtech having 2 DDR's (128MB each)and I am working on
> " Hello World " example of NDK1.92. Before execution of code DSP loads
> the .outfile in DDR2.Recently my program failed to load in DDR with
> the error of "Data Verification Failed at 0xE00A7114". I wanted to
> know How DSP dumps or manages Data in DDR, Is it makes sequential
> allocaion (Fills one then the other) or It makes odd even Page
> assignments.
> According to Schematics all the address/Data and control lines are
> equally shared among the two DDR's, So the situation is very confusing
> for me to correctly identify which DDR has gone wrong.
>

I believe that the DDRs are 16 bits each - 16 data bits high in one and
16 low in the other.

A few comments on troubleshooting memory or program load problems.
1. Keep it simple. Find the simplest failure case possible. Read all of
the items below and start with #4.
2. Don't troubleshoot with a program that uses stdio [like printf] until
things work with a program that doesn't.
3. Use a very small program - like a simple loop/counter to see it will
load. If it does, single step a few cycles.
4. This is where I start. Open a CCS memory window at 0xE00A7100. Read
the display and try to change the data in the failing location. If you
cannot, you have a very fundamental problem - most likely an incorrect
GEL file.

mikedunn

>
> Thanks and Kind Regards
> Ahmed Start a New Thread