Optimizing the Half-band Filters in Multistage Decimation and Interpolation
Multistage decimation and interpolation by powers of two get a lot cheaper if you size each half-band filter differently. Rick Lyons walks through spectra for three-stage examples that show why early stages can use narrower filters for decimation while interpolation reverses the order, and how aliasing and images are handled by later stages. Learn a simple rule to cut multipliers without sacrificing performance.
Two Easy Ways To Test Multistage CIC Decimation Filters
Rick Lyons shows that you can validate multistage CIC decimation filters with just two obvious tests, no elaborate spectral setup required. Apply a unit-sample impulse to check a combinatorial yout(1) value when D ≥ S, or feed an all-ones step to confirm an S-sample transient followed by a DS steady state; the Appendix ties both checks to Pascal's triangle and binomial math.
Compute the Frequency Response of a Multistage Decimator
This post shows a practical way to compute the full frequency response of a multistage decimator by representing every stage at the input sample rate. The author walks through upsampling lower-rate FIR coefficients, convolving to form the overall impulse response, and taking a DFT, then demonstrates how aliasing and stopband placement affect the aliased components. Example Matlab code and plots illustrate each step.
Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization
A Matlab toolbox streamlines the design and optimization of multi-stage decimation filters for sigma-delta ADCs. MSD-toolbox automates stage-count and decimation-factor selection, generates Parks-McClellan equiripple FIR coefficients, and iteratively selects coefficient quantization to meet in-band noise constraints. It accepts sigma-delta bitstream stimuli for spectral and intra-stage analysis, includes cost estimation routines, and is published open-source on MathWorks with examples and a dissertation reference.
A Beginner's Guide To Cascaded Integrator-Comb (CIC) Filters
Rick Lyons breaks down cascaded integrator-comb filters into clear, practical terms, showing why they are the efficient choice for high-rate decimation and interpolation in hardware. The post explains CIC structure, its sinc-like frequency response, multistage tradeoffs, register-bit-width rules, and simple FIR compensation tricks. Hands-on tips and references make it easy for engineers to design and implement robust CIC-based decimators and interpolators.
Decimators Using Cascaded Multiplierless Half-band Filters
In my last post, I provided coefficients for several multiplierless half-band FIR filters. In the comment section, Rick Lyons mentioned that such filters would be useful in a multi-stage decimator. For such an application, any subsequent multipliers save on resources, since they operate at a fraction of the maximum sample frequency. We’ll examine the frequency response and aliasing of a multiplierless decimate-by-8 cascade in this article, and we’ll also discuss an interpolator cascade using the same half-band filters.
