## Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization

During my research on digital FIR decimation filters I have been developing various Matlab scripts and functions. In which I have decided later on to consolidate it in a form of a toolbox. I have developed this toolbox to assist and automate the process of designing the multi-stage decimation filter(s). The toolbox is published as an open-source at the MathWorks web-site. My dissertation is open for public online as well. The toolbox has a wide set of examples to guide the user...

## Canonic Signed Digit (CSD) Representation of Integers

In my last post I presented Matlab code to synthesize multiplierless FIR filters using Canonic Signed Digit (CSD) coefficients. I included a function dec2csd1.m (repeated here in Appendix A) to convert decimal integers to binary CSD values. Here I want to use that function to illustrate a few properties of CSD numbers.

In a binary signed-digit number system, we allow each binary digit to have one of the three values {0, 1, -1}. Thus, for example, the binary value 1 1...

## Matlab Code to Synthesize Multiplierless FIR Filters

This article presents Matlab code to synthesize multiplierless Finite Impulse Response (FIR) lowpass filters.

A filter coefficient can be represented as a sum of powers of 2. For example, if a coefficient = decimal 5 multiplies input x, the output is $y= 2^2*x + 2^0*x$. The factor of $2^2$ is then implemented with a shift of 2 bits. This method is not efficient for coefficients having a lot of 1’s, e.g. decimal 31 = 11111. To reduce the number of non-zero...

## The Power Spectrum

Often, when calculating the spectrum of a sampled signal, we are interested in relative powers, and we don’t care about the absolute accuracy of the y axis. However, when the sampled signal represents an analog signal, we sometimes need an accurate picture of the analog signal’s power in the frequency domain. This post shows how to calculate an accurate power spectrum.

Parseval’s theorem [1,2] is a property of the Discrete Fourier Transform (DFT) that...

## Digital PLL's -- Part 2

In Part 1, we found the time response of a 2nd order PLL with a proportional + integral (lead-lag) loop filter. Now let’s look at this PLL in the Z-domain [1, 2]. We will find that the response is characterized by a loop natural frequency ωn and damping coefficient ζ.

Having a Z-domain model of the DPLL will allow us to do three things:

Compute the values of loop filter proportional gain KL and integrator gain KI that give the desired loop natural frequency and...## Digital PLL's -- Part 1

1. IntroductionFigure 1.1 is a block diagram of a digital PLL (DPLL). The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal. The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance. The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.

One application of the DPLL is to recover the timing in a digital...

## Decimator Image Response

Note: this is an improved version of a post I made to the dsp forum a few weeks ago.

This article presents a way to compute and plot the image response of a decimator. I’m defining the image response as the unwanted spectrum of the impulse response after downsampling, relative to the desired passband response.

Consider a decimate-by-4 filter with fs= 4 Hz, to which we apply the signal spectrum shown in Figure 1. The desired signal is the CW component at 0.22 Hz,...

## A poor man's Simulink

Glue between Octave and NGSPICE for discrete- and continuous time cosimulation (download) Keywords: Octave, SPICE, Simulink

IntroductionMany DSP problems have close ties with the analog world. For example, a switched-mode audio power amplifier uses a digital control loop to open and close power transistors driving an analog filter. There are commercial tools for digital-analog cosimulation: Simulink comes to mind, and mainstream EDA vendors support VHDL-AMS or Verilog-A in their...

## Spline interpolation

A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog

IntroductionSplines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...

## 'z' as in 'Zorro': Frequency Masking FIR

An efficient way to implement FIR filters. Matlab / Octave example included. Keywords: Frequency masking FIR filter implementation

IntroductionAn "upsampled" FIR filter uses multiple-sample delays between the taps, compared to the unity delays in a conventional FIR filter. The resulting frequency response has steeper edges, but contains periodic images along the frequency axis (Fig. 1). Due to the latter, it is typically not too useful on its own.

Figure 1: Conventional and 'upsampled'...## Delay estimation by FFT

Given x=sig(t) and y=ref(t), returns [c, ref(t+delta), delta)] = fitSignal(y, x);:Estimates and corrects delay and scaling factor between two signals Code snippetThis article relates to the Matlab / Octave code snippet: Delay estimation with subsample resolution It explains the algorithm and the design decisions behind it.

IntroductionThere are many DSP-related problems, where an unknown timing between two signals needs to be determined and corrected, for example, radar, sonar,...

## Canonic Signed Digit (CSD) Representation of Integers

In my last post I presented Matlab code to synthesize multiplierless FIR filters using Canonic Signed Digit (CSD) coefficients. I included a function dec2csd1.m (repeated here in Appendix A) to convert decimal integers to binary CSD values. Here I want to use that function to illustrate a few properties of CSD numbers.

In a binary signed-digit number system, we allow each binary digit to have one of the three values {0, 1, -1}. Thus, for example, the binary value 1 1...

## Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization

During my research on digital FIR decimation filters I have been developing various Matlab scripts and functions. In which I have decided later on to consolidate it in a form of a toolbox. I have developed this toolbox to assist and automate the process of designing the multi-stage decimation filter(s). The toolbox is published as an open-source at the MathWorks web-site. My dissertation is open for public online as well. The toolbox has a wide set of examples to guide the user...

## A poor man's Simulink

Glue between Octave and NGSPICE for discrete- and continuous time cosimulation (download) Keywords: Octave, SPICE, Simulink

IntroductionMany DSP problems have close ties with the analog world. For example, a switched-mode audio power amplifier uses a digital control loop to open and close power transistors driving an analog filter. There are commercial tools for digital-analog cosimulation: Simulink comes to mind, and mainstream EDA vendors support VHDL-AMS or Verilog-A in their...

## Time Machine, Anyone?

Abstract: Dispersive linear systems with negative group delay have caused much confusion in the past. Some claim that they violate causality, others that they are the cause of superluminal tunneling. Can we really receive messages before they are sent? This article aims at pouring oil in the fire and causing yet more confusion :-).

IntroductionIn this article we reproduce the results of a physical experiment...

## Digital PLL's -- Part 1

1. IntroductionFigure 1.1 is a block diagram of a digital PLL (DPLL). The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal. The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance. The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.

One application of the DPLL is to recover the timing in a digital...

## TCP/IP interface (Matlab/Octave)

Communicate with measurement instruments via Ethernet (no-toolbox-Matlab or Octave)

PurposeMeasurement automation is digital signal processing in a wider sense: Getting a digital signal from an analog world usually involves some measurement instruments, for example a spectrum analyzer. Modern instruments, and also many off-the-shelf prototyping boards such as FPGA cards [1] or microcontrollers [2] are able to communicate via Ethernet. Here, I provide some basic mex-functions (compiled C...

## Design of an anti-aliasing filter for a DAC

- Octaveforge / Matlab design script. Download: here
- weighted numerical optimization of Laplace-domain transfer function
- linear-phase design, optimizes vector error (magnitude and phase)
- design process calculates and corrects group delay internally
- includes sinc() response of the sample-and-hold stage in the ADC
- optionally includes multiplierless FIR filter

Digital-to-analog conversion connects digital...

## Matlab Code to Synthesize Multiplierless FIR Filters

This article presents Matlab code to synthesize multiplierless Finite Impulse Response (FIR) lowpass filters.

A filter coefficient can be represented as a sum of powers of 2. For example, if a coefficient = decimal 5 multiplies input x, the output is $y= 2^2*x + 2^0*x$. The factor of $2^2$ is then implemented with a shift of 2 bits. This method is not efficient for coefficients having a lot of 1’s, e.g. decimal 31 = 11111. To reduce the number of non-zero...

## Digital PLL's -- Part 2

In Part 1, we found the time response of a 2nd order PLL with a proportional + integral (lead-lag) loop filter. Now let’s look at this PLL in the Z-domain [1, 2]. We will find that the response is characterized by a loop natural frequency ωn and damping coefficient ζ.

Having a Z-domain model of the DPLL will allow us to do three things:

Compute the values of loop filter proportional gain KL and integrator gain KI that give the desired loop natural frequency and...## Delay estimation by FFT

Given x=sig(t) and y=ref(t), returns [c, ref(t+delta), delta)] = fitSignal(y, x);:Estimates and corrects delay and scaling factor between two signals Code snippetThis article relates to the Matlab / Octave code snippet: Delay estimation with subsample resolution It explains the algorithm and the design decisions behind it.

IntroductionThere are many DSP-related problems, where an unknown timing between two signals needs to be determined and corrected, for example, radar, sonar,...

## Time Machine, Anyone?

Abstract: Dispersive linear systems with negative group delay have caused much confusion in the past. Some claim that they violate causality, others that they are the cause of superluminal tunneling. Can we really receive messages before they are sent? This article aims at pouring oil in the fire and causing yet more confusion :-).

IntroductionIn this article we reproduce the results of a physical experiment...

## TCP/IP interface (Matlab/Octave)

Communicate with measurement instruments via Ethernet (no-toolbox-Matlab or Octave)

PurposeMeasurement automation is digital signal processing in a wider sense: Getting a digital signal from an analog world usually involves some measurement instruments, for example a spectrum analyzer. Modern instruments, and also many off-the-shelf prototyping boards such as FPGA cards [1] or microcontrollers [2] are able to communicate via Ethernet. Here, I provide some basic mex-functions (compiled C...

## Instantaneous Frequency Measurement

I would like to talk about the oft used method of measuring the carrier frequency in the world of Signal Collection and Characterization world. It is an elegant technique because of its simplicity. But, of course, with simplicity, there come drawbacks (sometimes...especially with this one!).

In the world of Radar detection and characterization, one of the key characteristics of interest is the carrier frequency of the signal. If the radar is pulsed, you will have a very wide bandwidth, a...

## Design of an anti-aliasing filter for a DAC

- Octaveforge / Matlab design script. Download: here
- weighted numerical optimization of Laplace-domain transfer function
- linear-phase design, optimizes vector error (magnitude and phase)
- design process calculates and corrects group delay internally
- includes sinc() response of the sample-and-hold stage in the ADC
- optionally includes multiplierless FIR filter

Digital-to-analog conversion connects digital...

## Spline interpolation

A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog

IntroductionSplines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...

## A poor man's Simulink

Glue between Octave and NGSPICE for discrete- and continuous time cosimulation (download) Keywords: Octave, SPICE, Simulink

IntroductionMany DSP problems have close ties with the analog world. For example, a switched-mode audio power amplifier uses a digital control loop to open and close power transistors driving an analog filter. There are commercial tools for digital-analog cosimulation: Simulink comes to mind, and mainstream EDA vendors support VHDL-AMS or Verilog-A in their...

## Design study: 1:64 interpolating pulse shaping FIR

This article is the documentation to a code snippet that originated from a discussion on comp.dsp.

The task is to design a root-raised cosine filter with a rolloff of a=0.15 that interpolates to 64x the symbol rate at the input.

The code snippet shows a solution that is relatively straightforward to design and achieves reasonably good efficiency using only FIR filters.

Motivation: “simple solutions?”## Discrete Wavelet Transform Filter Bank Implementation (part 2)

Following the previous blog entry: http://www.dsprelated.com/showarticle/115.php

Difference between DWT and DWPTBefore getting to the equivalent filter obtention, I first want to talk about the difference between DWT(Discrete Wavelet Transform) and DWPT (Discrete Wavelet Packet Transform). The latter is used mostly for image processing.

While DWT has a single "high-pass" branch that filters the signal with the h1 filter, the DWPT separates branches symmetricaly: this means that one...

## Digital PLL's -- Part 1

1. IntroductionFigure 1.1 is a block diagram of a digital PLL (DPLL). The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal. The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance. The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.

One application of the DPLL is to recover the timing in a digital...