Hi, Jeff,
Ok, so you removed clock() and printf() -- as the only changes -- and no error
messages?
> Yes.
The code after being changed:
#include
#include
void main()
{
int j, a = 0;
clock_t start, finish;
double duration;
start = 1;//clock();
for (j = 0; j < 3; j++) {
a += 1;
}
finish = 8;//clock();
duration = (double)(finish -start) / CLOCKS_PER_SEC;
//printf("%f\n", duration);
}
In this case you keep clock() and printf(), and add while (1) as last line of
code inside main(), and again, no errors?
>yes.
The code after being changed:
#include
#include
void main()
{
int j, a = 0;
clock_t start, finish;
double duration;
start = clock();
for (j = 0; j < 3; j++) {
a += 1;
}
finish = clock();
duration = (double)(finish -start) / CLOCKS_PER_SEC;
printf("%f\n", duration);
while(1);
}
________________________________
From: Jeff Brower
To: c...
Cc: Yi Guo
Sent: Fri, February 18, 2011 8:30:05 AM
Subject: Re: [c6x] problem with using clock() and printf()
Yi Guo-
> Thenks. See the Q&As bellow.
>
> 1) This may have been asked already... did you try without clock() and
> printf()? With those lines commented, do you
> still get breakpoint-related error messages?
>>no, i don't.
Ok, so you removed clock() and printf() -- as the only changes -- and no error
messages?
> 2) If you add:
>
> while (1);
>
> as the last line, can the program run without errors?
>> yes, it runs well.
In this case you keep clock() and printf(), and add while (1) as last line of
code inside main(), and again, no errors?
-Jeff
> ________________________________
> From: Jeff Brower
> To: c...
> Cc: Yi Guo
> Sent: Thu, February 17, 2011 12:44:43 PM
> Subject: Re: [c6x] problem with using clock() and printf()
>
> Yi Guo-
>
>> void main()
>> {
>> int j, a = 0;
>> clock_t start, finish;
>> double duration;
>> start = clock();
>> for (j = 0; j < 3; j++) {
>> a += 1;
>> }
>> finish = clock();
>> duration = (double)(finish -start) / CLOCKS_PER_SEC;
>> printf("%f\n", duration);
>> }
>
> 1) This may have been asked already... did you try without clock() and
> printf()? With those lines commented, do you
> still get breakpoint-related error messages?
>
> 2) If you add:
>
> while (1);
>
> as the last line, can the program run without errors?
>
> -Jeff
>> Mikedunn,
>>
>> Thank you for help.
>> I didn't find any optimization options were selected:
>> Build option-->compiler-->opt level-->noneBuild
option-->compiler-->program
>> level opt-->none
>>
>> I followed the steps you provided to do some test for some times, I
>> always received an error message from CCS:
>> Error: Error 0x0000000C/-2044 Error during: Register, Break Point, No
>> breakpoint at 0x00007360
>>
>> Then here are Q&As.
>> Q1. If 0-4 is successful, repeat 1-4 a few times to make sure that results
are
>> consistent. results??
>> See the error message above.
>>
>> Q2. What are the contents of your GEL file?? paste in your next post.
>> /*--------------------------*/
>> /* EVMDM642.gel */
>> /* Version 1.70 */
>> /*--------------------------*/
>> /* The StartUp() function is called each time CCS is started. */
>> /* Customize this function to perform desired initialization. */
>> /*--------------------------*/
>> StartUp()
>> {
>> setup_memory_map();
>> GEL_Reset();
>> init_emif();
>> }
>> /*--------------------------*/
>> /* Setup memory map for DM642 EVM. */
>> /* */
>> /*--------------------------*/
>> setup_memory_map()
>> {
>> GEL_MapOn();
>> GEL_MapReset();
>> /* On-chip memory map */
>> GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory */
>> GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS */
>> GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS */
>> GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS */
>> GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS */
>> GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS */
>> GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS */
>> GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS */
>> GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND PARAM */
>> GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS */
>> GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS */
>> GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS */
>> GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS */
>> GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device Configuration */
>> GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS */
>> GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS */
>> GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS */
>> GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS */
>> GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control */
>> GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control */
>> GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control */
>> GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS */
>> GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper */
>> GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS */
>> GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS */
>> GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS */
>> GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data, EDMA map */
>> GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data, EDMA map */
>> GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A Data */
>> GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B Data */
>> GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A Data */
>> GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B Data */
>> GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A Data */
>> GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B Data */
>> /* Off-chip memory map */
>> GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM EMIF-A, CE0*/
>> GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash EMIF-A, CE1 */
>> GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A, CE1 */
>> GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2 EXPANSION */
>> GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3 EXPANSION */
>> }
>> /*--------------------------*/
>> /* init_emif() */
>> /*--------------------------*/
>> init_emif()
>> {
>> #define EMIFA_GCTL 0x01800000
>> #define EMIFA_CE1 0x01800004
>> #define EMIFA_CE0 0x01800008
>> #define EMIFA_CE2 0x01800010
>> #define EMIFA_CE3 0x01800014
>> #define EMIFA_SDRAMCTL 0x01800018
>> #define EMIFA_SDRAMTIM 0x0180001c
>> #define EMIFA_SDRAMEXT 0x01800020
>> #define EMIFA_CE1SECCTL 0x01800044
>> #define EMIFA_CE0SECCTL 0x01800048
>> #define EMIFA_CE2SECCTL 0x01800050
>> #define EMIFA_CE3SECCTL 0x01800054
>>
>> /* EMIFA */
>> *(int *)EMIFA_GCTL = 0x00052078;
>> *(int *)EMIFA_CE0 = 0xffffffd3; /* CE0 SDRAM */
>> *(int *)EMIFA_CE1 = 0x73a28e01; /* CE1 Flash + CPLD */
>> *(int *)EMIFA_CE2 = 0x22a28a22; /* CE2 Daughtercard 32-bit async */
>> *(int *)EMIFA_CE3 = 0x22a28a42; /* CE3 Daughtercard 32-bit sync */
>> *(int *)EMIFA_SDRAMCTL = 0x57115000; /* SDRAM control */
>> *(int *)EMIFA_SDRAMTIM = 0x0000081b; /* SDRAM timing (refresh) */
>> *(int *)EMIFA_SDRAMEXT = 0x001faf4d; /* SDRAM extended control */
>> *(int *)EMIFA_CE0SECCTL= 0x00000002; /* CE0 Secondary Control Reg. */
>> *(int *)EMIFA_CE1SECCTL= 0x00000002; /* CE1 Secondary Control Reg. */
>> *(int *)EMIFA_CE2SECCTL= 0x00000002; /* CE2 Secondary Control Reg. */
>> *(int *)EMIFA_CE3SECCTL= 0x00000073; /* CE3 Secondary Control Reg. */
>> }
>> /*--------------------------*/
>> /* clear_memory_map() */
>> /*--------------------------*/
>> clear_memory_map()
>> {
>> GEL_MapOff();
>> }
>> /*--------------------------*/
>> /* FlushCache() */
>> /*--------------------------*/
>> FlushCache()
>> {
>> /* Invalidate L1I and L1D */
>> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
>>
>> /* Clean L2 */
>> *(int *)0x01845004 = 0x1;
>> }
>>
>> /*--------------------------*/
>> /* OnReset() */
>> /*--------------------------*/
>> OnReset(int nErrorCode)
>> {
>> init_emif();
>> }
>>
>> /*--------------------------*/
>> /* OnPreFileLoaded() */
>> /* This function is called automatically when the 'Load
Program'*/
>> /* Menu item is selected. */
>> /*--------------------------*/
>> OnPreFileLoaded()
>> {
>> /* GEL_Reset(); -- Commented out for CCS 2.20 */
>> FlushCache();
>> IER = 0;
>> IFR = 0;
>> init_emif();
>> }
>> /*--------------------------*/
>> /* OnRestart() */
>> /* This function is called by CCS when you do Debug->Restart. */
>> /* The goal is to put the C6x into a known good state with */
>> /* respect to cache, edma and interrupts. */
>> /* Failure to do this can cause problems when you restart and */
>> /* run your application code multiple times. This is different */
>> /* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
>> /* C6x into a known good state. */
>> /*--------------------------*/
>> OnRestart(int nErrorCode )
>> {
>> /* Turn off L2 for all EMIFA CE spaces. App should
>> * manage these for coherancy in the application.
>> * GEL_TextOut("Turn off cache segment\n");
>> */
>> *(int *)0x1848200 = 0; /* MAR0 */
>> *(int *)0x1848204 = 0; /* MAR1 */
>> *(int *)0x1848208 = 0; /* MAR2 */
>> *(int *)0x184820c = 0; /* MAR3 */
>>
>> /* Disable EDMA events and interrupts and clear any
>> * pending events.
>> * GEL_TextOut("Disable EDMA event\n");
>> */
>> *(int *)0x01A0FFA8 = 0; /* CIERH */
>> *(int *)0x01A0FFB4 = 0; /* EERH */
>> *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
>>
>> *(int *)0x01A0FFE8 = 0; /* CIERL */
>> *(int *)0x01A0FFF4 = 0; /* EERL */
>> *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
>>
>> /* Disable other interrupts */
>> IER = 0;
>> IFR = 0;
>> }
>> /*--------------------------*/
>> /* RESET MENU */
>> /*--------------------------*/
>> menuitem "Resets";
>> hotmenu Reset_BreakPts_and_EMIF()
>> {
>> GEL_BreakPtReset();
>> GEL_Reset();
>> init_emif();
>> }
>> hotmenu Flush_Cache()
>> {
>> FlushCache();
>> }
>> /*--------------------------*/
>> /* MEMORY MAP MENU */
>> /*--------------------------*/
>> menuitem "Memory Map";
>> hotmenu SetMemoryMap()
>> {
>> setup_memory_map();
>> }
>> hotmenu ClearMemoryMap()
>> {
>> clear_memory_map();
>> }
>> /*--------------------------*/
>> /* BOARD OPTIONS MENU */
>> /*--------------------------*/
>> menuitem "Board Options";
>> #define CPLD_REVISION 0x9008001F
>> hotmenu CheckFPGARevision()
>> {
>> GEL_TextOut(" FPGA Revision %d\n","Output",1,1,1, *(char
*)CPLD_REVISION);
>> GEL_TextOut(" Note: Revision only valid if FGPA DONE LED is on
>> (DS9)\n","Output",1,1,1);
>> }
>>
>> Q3. What is your target board??
>> EVMDM642
>> 720MHz
>>
>> ________________________________
>> From: mikedunn
>> To: Yi Guo
>> Cc: c...
>> Sent: Thu, February 17, 2011 3:21:51 AM
>> Subject: Re: [c6x] problem with using clock() and printf()
>> Yi Guo,
>>
>> OK, lets see if we can get a set of consistent symptoms.
>> Note that the steps below apply to first and second generation C6000
devices
>> [like 6201, 6713, 6416] in addition to the DM642. Do not use with C64+
> devices.
>> The following steps will are not likely to resolve your problem, but they
will
>> eliminate any doubts WRT extraneous interrupts and
possible erratic reset
>> behavior. IMO it is always good practice to initialize the interrupt
vectors
>> when troubleshooting [I plug them with breakpoints - if you get an
unexpected
>> interrupt, you know it right away].
>> STEP 1:
>> First a minor change to the .cmd file. add the 'VECS' and
'.vectors' lines as
>> shown below:
>> --begin--
>> MEMORY
>> {
>> VECS: org = 000h, len = 400h
>> IRAM: org = 400h, len = 0FC00h
>> }
>> SECTIONS
>> {
>> .vectors :> VECS
>> ------end of changes---
>> STEP 2:
>> Then add the code below to a file called 'vectors.asm'.
>> Begin 'vectors.asm'---------
>> ;
>> ; Copyright 2003 by Texas Instruments Incorporated.
>> ; All rights reserved. Property of Texas Instruments Incorporated.
>> ; Restricted rights to use, duplicate or disclose this code are
>> ; granted through contract.
>> ;
>> ;
>> ; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
>> ; hacked by mikedunn
>> ;
>
problem with using clock() and printf()
Started by ●February 14, 2011
Reply by ●February 18, 20112011-02-18
Reply by ●February 18, 20112011-02-18
Yi Guo,
What did you expect to happen when the execution ran off the end of the program?
R. Williams
---------- Original Message -----------
From: Yi Guo
To: Jeff Brower , c...
Sent: Thu, 17 Feb 2011 17:48:52 -0800 (PST)
Subject: Re: [c6x] problem with using clock() and printf()
> Hi, Jeff,
> Ok, so you removed clock() and printf() -- as the only changes -- and
> no error messages?
> > Yes.
>
> The code after being changed:
> #include
> #include void main()
> {
> int j, a = 0;
> clock_t start, finish;
> double duration;
> start = 1;//clock();
> for (j = 0; j < 3; j++) {
> a += 1;
> }
> finish = 8;//clock();
> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> // printf("%f\n", duration);
> }
>
> In this case you keep clock() and printf(), and add while (1) as last
> line of code inside main(), and again, no errors?
> >yes.
>
> The code after being changed:
> #include
> #include void main()
> {
> int j, a = 0;
> clock_t start, finish;
> double duration;
> start = clock();
> for (j = 0; j < 3; j++) {
> a += 1;
> }
> finish = clock();
> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> printf("%f\n", duration);
> while(1);
> }
>
> ________________________________
> From: Jeff Brower
> To: c...
> Cc: Yi Guo
> Sent: Fri, February 18, 2011 8:30:05 AM
> Subject: Re: [c6x] problem with using clock() and printf()
>
> Yi Guo-
>
> > Thenks. See the Q&As bellow.
> >
> > 1) This may have been asked already... did you try without clock() and
> > printf()? With those lines commented, do you
> > still get breakpoint-related error messages?
> >>no, i don't.
>
> Ok, so you removed clock() and printf() -- as the only changes -- and
> no error messages?
>
> > 2) If you add:
> >
> > while (1);
> >
> > as the last line, can the program run without errors?
> >> yes, it runs well.
>
> In this case you keep clock() and printf(), and add while (1) as last
> line of code inside main(), and again, no errors?
>
> -Jeff
>
> > ________________________________
> > From: Jeff Brower
> > To: c...
> > Cc: Yi Guo
> > Sent: Thu, February 17, 2011 12:44:43 PM
> > Subject: Re: [c6x] problem with using clock() and printf()
> >
> > Yi Guo-
> >
> >> void main()
> >> {
> >> int j, a = 0;
> >> clock_t start, finish;
> >> double duration;
> >> start = clock();
> >> for (j = 0; j < 3; j++) {
> >> a += 1;
> >> }
> >> finish = clock();
> >> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> >> printf("%f\n", duration);
> >> }
> >
> > 1) This may have been asked already... did you try without clock() and
> > printf()? With those lines commented, do you
> > still get breakpoint-related error messages?
> >
> > 2) If you add:
> >
> > while (1);
> >
> > as the last line, can the program run without errors?
> >
> > -Jeff
> >
> >
> >> Mikedunn,
> >>
> >> Thank you for help.
> >> I didn't find any optimization options were selected:
> >> Build option-->compiler-->opt level-->noneBuild option-->compiler-->program
> >> level opt-->none
> >>
> >> I followed the steps you provided to do some test for some times, I
> >> always received an error message from CCS:
> >> Error: Error 0x0000000C/-2044 Error during: Register, Break Point, No
> >> breakpoint at 0x00007360
> >>
> >> Then here are Q&As.
> >> Q1. If 0-4 is successful, repeat 1-4 a few times to make sure that results
> are
> >> consistent. results??
> >> See the error message above.
> >>
> >> Q2. What are the contents of your GEL file?? paste in your next post.
> >> /*--------------------------*/
> >> /* EVMDM642.gel */
> >> /* Version 1.70 */
> >> /*--------------------------*/
> >> /* The StartUp() function is called each time CCS is started. */
> >> /* Customize this function to perform desired initialization. */
> >> /*--------------------------*/
> >> StartUp()
> >> {
> >> setup_memory_map();
> >> GEL_Reset();
> >> init_emif();
> >> }
> >> /*--------------------------*/
> >> /* Setup memory map for DM642 EVM. */
> >> /* */
> >> /*--------------------------*/
> >> setup_memory_map()
> >> {
> >> GEL_MapOn();
> >> GEL_MapReset();
> >> /* On-chip memory map */
> >> GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory */
> >> GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS */
> >> GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS */
> >> GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS */
> >> GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS */
> >> GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS */
> >> GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS */
> >> GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS */
> >> GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND PARAM */
> >> GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS */
> >> GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS */
> >> GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS */
> >> GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS */
> >> GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device Configuration */
> >> GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS */
> >> GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS */
> >> GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS */
> >> GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS */
> >> GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control */
> >> GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control */
> >> GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control */
> >> GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS */
> >> GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper */
> >> GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS */
> >> GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS */
> >> GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS */
> >> GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data, EDMA map */
> >> GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data, EDMA map */
> >> GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A Data */
> >> GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B Data */
> >> GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A Data */
> >> GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B Data */
> >> GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A Data */
> >> GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B Data */
> >> /* Off-chip memory map */
> >> GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM EMIF-A, CE0*/
> >> GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash EMIF-A, CE1 */
> >> GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A, CE1 */
> >> GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2 EXPANSION */
> >> GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3 EXPANSION */
> >> }
> >> /*--------------------------*/
> >> /* init_emif() */
> >> /*--------------------------*/
> >> init_emif()
> >> {
> >> #define EMIFA_GCTL 0x01800000
> >> #define EMIFA_CE1 0x01800004
> >> #define EMIFA_CE0 0x01800008
> >> #define EMIFA_CE2 0x01800010
> >> #define EMIFA_CE3 0x01800014
> >> #define EMIFA_SDRAMCTL 0x01800018
> >> #define EMIFA_SDRAMTIM 0x0180001c
> >> #define EMIFA_SDRAMEXT 0x01800020
> >> #define EMIFA_CE1SECCTL 0x01800044
> >> #define EMIFA_CE0SECCTL 0x01800048
> >> #define EMIFA_CE2SECCTL 0x01800050
> >> #define EMIFA_CE3SECCTL 0x01800054
> >>
> >> /* EMIFA */
> >> *(int *)EMIFA_GCTL = 0x00052078;
> >> *(int *)EMIFA_CE0 = 0xffffffd3; /* CE0 SDRAM */
> >> *(int *)EMIFA_CE1 = 0x73a28e01; /* CE1 Flash + CPLD */
> >> *(int *)EMIFA_CE2 = 0x22a28a22; /* CE2 Daughtercard 32-bit async */
> >> *(int *)EMIFA_CE3 = 0x22a28a42; /* CE3 Daughtercard 32-bit sync */
> >> *(int *)EMIFA_SDRAMCTL = 0x57115000; /* SDRAM control */
> >> *(int *)EMIFA_SDRAMTIM = 0x0000081b; /* SDRAM timing (refresh) */
> >> *(int *)EMIFA_SDRAMEXT = 0x001faf4d; /* SDRAM extended control */
> >> *(int *)EMIFA_CE0SECCTL= 0x00000002; /* CE0 Secondary Control Reg. */
> >> *(int *)EMIFA_CE1SECCTL= 0x00000002; /* CE1 Secondary Control Reg. */
> >> *(int *)EMIFA_CE2SECCTL= 0x00000002; /* CE2 Secondary Control Reg. */
> >> *(int *)EMIFA_CE3SECCTL= 0x00000073; /* CE3 Secondary Control Reg. */
> >> }
> >> /*--------------------------*/
> >> /* clear_memory_map() */
> >> /*--------------------------*/
> >> clear_memory_map()
> >> {
> >> GEL_MapOff();
> >> }
> >> /*--------------------------*/
> >> /* FlushCache() */
> >> /*--------------------------*/
> >> FlushCache()
> >> {
> >> /* Invalidate L1I and L1D */
> >> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
> >>
> >> /* Clean L2 */
> >> *(int *)0x01845004 = 0x1;
> >> }
> >>
> >> /*--------------------------*/
> >> /* OnReset() */
> >> /*--------------------------*/
> >> OnReset(int nErrorCode)
> >> {
> >> init_emif();
> >> }
> >>
> >> /*--------------------------*/
> >> /* OnPreFileLoaded() */
> >> /* This function is called automatically when the 'Load Program'*/
> >> /* Menu item is selected. */
> >> /*--------------------------*/
> >> OnPreFileLoaded()
> >> {
> >> /* GEL_Reset(); -- Commented out for CCS 2.20 */
> >> FlushCache();
> >> IER = 0;
> >> IFR = 0;
> >> init_emif();
> >> }
> >> /*--------------------------*/
> >> /* OnRestart() */
> >> /* This function is called by CCS when you do Debug->Restart. */
> >> /* The goal is to put the C6x into a known good state with */
> >> /* respect to cache, edma and interrupts. */
> >> /* Failure to do this can cause problems when you restart and */
> >> /* run your application code multiple times. This is different */
> >> /* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
> >> /* C6x into a known good state. */
> >> /*--------------------------*/
> >> OnRestart(int nErrorCode )
> >> {
> >> /* Turn off L2 for all EMIFA CE spaces. App should
> >> * manage these for coherancy in the application.
> >> * GEL_TextOut("Turn off cache segment\n");
> >> */
> >> *(int *)0x1848200 = 0; /* MAR0 */
> >> *(int *)0x1848204 = 0; /* MAR1 */
> >> *(int *)0x1848208 = 0; /* MAR2 */
> >> *(int *)0x184820c = 0; /* MAR3 */
> >>
> >> /* Disable EDMA events and interrupts and clear any
> >> * pending events.
> >> * GEL_TextOut("Disable EDMA event\n");
> >> */
> >> *(int *)0x01A0FFA8 = 0; /* CIERH */
> >> *(int *)0x01A0FFB4 = 0; /* EERH */
> >> *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
> >>
> >> *(int *)0x01A0FFE8 = 0; /* CIERL */
> >> *(int *)0x01A0FFF4 = 0; /* EERL */
> >> *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
> >>
> >> /* Disable other interrupts */
> >> IER = 0;
> >> IFR = 0;
> >> }
> >> /*--------------------------*/
> >> /* RESET MENU */
> >> /*--------------------------*/
> >> menuitem "Resets";
> >> hotmenu Reset_BreakPts_and_EMIF()
> >> {
> >> GEL_BreakPtReset();
> >> GEL_Reset();
> >> init_emif();
> >> }
> >> hotmenu Flush_Cache()
> >> {
> >> FlushCache();
> >> }
> >> /*--------------------------*/
> >> /* MEMORY MAP MENU */
> >> /*--------------------------*/
> >> menuitem "Memory Map";
> >> hotmenu SetMemoryMap()
> >> {
> >> setup_memory_map();
> >> }
> >> hotmenu ClearMemoryMap()
> >> {
> >> clear_memory_map();
> >> }
> >> /*--------------------------*/
> >> /* BOARD OPTIONS MENU */
> >> /*--------------------------*/
> >> menuitem "Board Options";
> >> #define CPLD_REVISION 0x9008001F
> >> hotmenu CheckFPGARevision()
> >> {
> >> GEL_TextOut(" FPGA Revision %d\n","Output",1,1,1, *(char *)CPLD_REVISION);
> >> GEL_TextOut(" Note: Revision only valid if FGPA DONE LED is on
> >> (DS9)\n","Output",1,1,1);
> >> }
> >>
> >> Q3. What is your target board??
> >> EVMDM642
> >> 720MHz
> >>
> >> ________________________________
> >> From: mikedunn
> >> To: Yi Guo
> >> Cc: c...
> >> Sent: Thu, February 17, 2011 3:21:51 AM
> >> Subject: Re: [c6x] problem with using clock() and printf()
> >>
> >>
> >> Yi Guo,
> >>
> >> OK, lets see if we can get a set of consistent symptoms.
> >> Note that the steps below apply to first and second generation C6000 devices
> >> [like 6201, 6713, 6416] in addition to the DM642. Do not use with C64+
> > devices.
> >> The following steps will are not likely to resolve your problem, but they
> will
> >> eliminate any doubts WRT extraneous interrupts and possible erratic reset
> >> behavior. IMO it is always good practice to initialize the interrupt vectors
> >> when troubleshooting [I plug them with breakpoints - if you get an unexpected
> >> interrupt, you know it right away].
> >> STEP 1:
> >> First a minor change to the .cmd file. add the 'VECS' and '.vectors' lines as
> >> shown below:
> >> --begin--
> >> MEMORY
> >> {
> >> VECS: org = 000h, len = 400h
> >> IRAM: org = 400h, len = 0FC00h
> >> }
> >> SECTIONS
> >> {
> >> .vectors :> VECS
> >> ------end of changes---
> >> STEP 2:
> >> Then add the code below to a file called 'vectors.asm'.
> >> Begin 'vectors.asm'---------
> >> ;
> >> ; Copyright 2003 by Texas Instruments Incorporated.
> >> ; All rights reserved. Property of Texas Instruments Incorporated.
> >> ; Restricted rights to use, duplicate or disclose this code are
> >> ; granted through contract.
> >> ;
> >> ;
> >> ; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
> >> ; hacked by mikedunn
> >> ;
> >
> >
> >
------- End of Original Message -------
_____________________________________
What did you expect to happen when the execution ran off the end of the program?
R. Williams
---------- Original Message -----------
From: Yi Guo
To: Jeff Brower , c...
Sent: Thu, 17 Feb 2011 17:48:52 -0800 (PST)
Subject: Re: [c6x] problem with using clock() and printf()
> Hi, Jeff,
> Ok, so you removed clock() and printf() -- as the only changes -- and
> no error messages?
> > Yes.
>
> The code after being changed:
> #include
> #include void main()
> {
> int j, a = 0;
> clock_t start, finish;
> double duration;
> start = 1;//clock();
> for (j = 0; j < 3; j++) {
> a += 1;
> }
> finish = 8;//clock();
> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> // printf("%f\n", duration);
> }
>
> In this case you keep clock() and printf(), and add while (1) as last
> line of code inside main(), and again, no errors?
> >yes.
>
> The code after being changed:
> #include
> #include void main()
> {
> int j, a = 0;
> clock_t start, finish;
> double duration;
> start = clock();
> for (j = 0; j < 3; j++) {
> a += 1;
> }
> finish = clock();
> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> printf("%f\n", duration);
> while(1);
> }
>
> ________________________________
> From: Jeff Brower
> To: c...
> Cc: Yi Guo
> Sent: Fri, February 18, 2011 8:30:05 AM
> Subject: Re: [c6x] problem with using clock() and printf()
>
> Yi Guo-
>
> > Thenks. See the Q&As bellow.
> >
> > 1) This may have been asked already... did you try without clock() and
> > printf()? With those lines commented, do you
> > still get breakpoint-related error messages?
> >>no, i don't.
>
> Ok, so you removed clock() and printf() -- as the only changes -- and
> no error messages?
>
> > 2) If you add:
> >
> > while (1);
> >
> > as the last line, can the program run without errors?
> >> yes, it runs well.
>
> In this case you keep clock() and printf(), and add while (1) as last
> line of code inside main(), and again, no errors?
>
> -Jeff
>
> > ________________________________
> > From: Jeff Brower
> > To: c...
> > Cc: Yi Guo
> > Sent: Thu, February 17, 2011 12:44:43 PM
> > Subject: Re: [c6x] problem with using clock() and printf()
> >
> > Yi Guo-
> >
> >> void main()
> >> {
> >> int j, a = 0;
> >> clock_t start, finish;
> >> double duration;
> >> start = clock();
> >> for (j = 0; j < 3; j++) {
> >> a += 1;
> >> }
> >> finish = clock();
> >> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> >> printf("%f\n", duration);
> >> }
> >
> > 1) This may have been asked already... did you try without clock() and
> > printf()? With those lines commented, do you
> > still get breakpoint-related error messages?
> >
> > 2) If you add:
> >
> > while (1);
> >
> > as the last line, can the program run without errors?
> >
> > -Jeff
> >
> >
> >> Mikedunn,
> >>
> >> Thank you for help.
> >> I didn't find any optimization options were selected:
> >> Build option-->compiler-->opt level-->noneBuild option-->compiler-->program
> >> level opt-->none
> >>
> >> I followed the steps you provided to do some test for some times, I
> >> always received an error message from CCS:
> >> Error: Error 0x0000000C/-2044 Error during: Register, Break Point, No
> >> breakpoint at 0x00007360
> >>
> >> Then here are Q&As.
> >> Q1. If 0-4 is successful, repeat 1-4 a few times to make sure that results
> are
> >> consistent. results??
> >> See the error message above.
> >>
> >> Q2. What are the contents of your GEL file?? paste in your next post.
> >> /*--------------------------*/
> >> /* EVMDM642.gel */
> >> /* Version 1.70 */
> >> /*--------------------------*/
> >> /* The StartUp() function is called each time CCS is started. */
> >> /* Customize this function to perform desired initialization. */
> >> /*--------------------------*/
> >> StartUp()
> >> {
> >> setup_memory_map();
> >> GEL_Reset();
> >> init_emif();
> >> }
> >> /*--------------------------*/
> >> /* Setup memory map for DM642 EVM. */
> >> /* */
> >> /*--------------------------*/
> >> setup_memory_map()
> >> {
> >> GEL_MapOn();
> >> GEL_MapReset();
> >> /* On-chip memory map */
> >> GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory */
> >> GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS */
> >> GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS */
> >> GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS */
> >> GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS */
> >> GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS */
> >> GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS */
> >> GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS */
> >> GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND PARAM */
> >> GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS */
> >> GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS */
> >> GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS */
> >> GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS */
> >> GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device Configuration */
> >> GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS */
> >> GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS */
> >> GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS */
> >> GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS */
> >> GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control */
> >> GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control */
> >> GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control */
> >> GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS */
> >> GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper */
> >> GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS */
> >> GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS */
> >> GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS */
> >> GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data, EDMA map */
> >> GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data, EDMA map */
> >> GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A Data */
> >> GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B Data */
> >> GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A Data */
> >> GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B Data */
> >> GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A Data */
> >> GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B Data */
> >> /* Off-chip memory map */
> >> GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM EMIF-A, CE0*/
> >> GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash EMIF-A, CE1 */
> >> GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A, CE1 */
> >> GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2 EXPANSION */
> >> GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3 EXPANSION */
> >> }
> >> /*--------------------------*/
> >> /* init_emif() */
> >> /*--------------------------*/
> >> init_emif()
> >> {
> >> #define EMIFA_GCTL 0x01800000
> >> #define EMIFA_CE1 0x01800004
> >> #define EMIFA_CE0 0x01800008
> >> #define EMIFA_CE2 0x01800010
> >> #define EMIFA_CE3 0x01800014
> >> #define EMIFA_SDRAMCTL 0x01800018
> >> #define EMIFA_SDRAMTIM 0x0180001c
> >> #define EMIFA_SDRAMEXT 0x01800020
> >> #define EMIFA_CE1SECCTL 0x01800044
> >> #define EMIFA_CE0SECCTL 0x01800048
> >> #define EMIFA_CE2SECCTL 0x01800050
> >> #define EMIFA_CE3SECCTL 0x01800054
> >>
> >> /* EMIFA */
> >> *(int *)EMIFA_GCTL = 0x00052078;
> >> *(int *)EMIFA_CE0 = 0xffffffd3; /* CE0 SDRAM */
> >> *(int *)EMIFA_CE1 = 0x73a28e01; /* CE1 Flash + CPLD */
> >> *(int *)EMIFA_CE2 = 0x22a28a22; /* CE2 Daughtercard 32-bit async */
> >> *(int *)EMIFA_CE3 = 0x22a28a42; /* CE3 Daughtercard 32-bit sync */
> >> *(int *)EMIFA_SDRAMCTL = 0x57115000; /* SDRAM control */
> >> *(int *)EMIFA_SDRAMTIM = 0x0000081b; /* SDRAM timing (refresh) */
> >> *(int *)EMIFA_SDRAMEXT = 0x001faf4d; /* SDRAM extended control */
> >> *(int *)EMIFA_CE0SECCTL= 0x00000002; /* CE0 Secondary Control Reg. */
> >> *(int *)EMIFA_CE1SECCTL= 0x00000002; /* CE1 Secondary Control Reg. */
> >> *(int *)EMIFA_CE2SECCTL= 0x00000002; /* CE2 Secondary Control Reg. */
> >> *(int *)EMIFA_CE3SECCTL= 0x00000073; /* CE3 Secondary Control Reg. */
> >> }
> >> /*--------------------------*/
> >> /* clear_memory_map() */
> >> /*--------------------------*/
> >> clear_memory_map()
> >> {
> >> GEL_MapOff();
> >> }
> >> /*--------------------------*/
> >> /* FlushCache() */
> >> /*--------------------------*/
> >> FlushCache()
> >> {
> >> /* Invalidate L1I and L1D */
> >> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
> >>
> >> /* Clean L2 */
> >> *(int *)0x01845004 = 0x1;
> >> }
> >>
> >> /*--------------------------*/
> >> /* OnReset() */
> >> /*--------------------------*/
> >> OnReset(int nErrorCode)
> >> {
> >> init_emif();
> >> }
> >>
> >> /*--------------------------*/
> >> /* OnPreFileLoaded() */
> >> /* This function is called automatically when the 'Load Program'*/
> >> /* Menu item is selected. */
> >> /*--------------------------*/
> >> OnPreFileLoaded()
> >> {
> >> /* GEL_Reset(); -- Commented out for CCS 2.20 */
> >> FlushCache();
> >> IER = 0;
> >> IFR = 0;
> >> init_emif();
> >> }
> >> /*--------------------------*/
> >> /* OnRestart() */
> >> /* This function is called by CCS when you do Debug->Restart. */
> >> /* The goal is to put the C6x into a known good state with */
> >> /* respect to cache, edma and interrupts. */
> >> /* Failure to do this can cause problems when you restart and */
> >> /* run your application code multiple times. This is different */
> >> /* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
> >> /* C6x into a known good state. */
> >> /*--------------------------*/
> >> OnRestart(int nErrorCode )
> >> {
> >> /* Turn off L2 for all EMIFA CE spaces. App should
> >> * manage these for coherancy in the application.
> >> * GEL_TextOut("Turn off cache segment\n");
> >> */
> >> *(int *)0x1848200 = 0; /* MAR0 */
> >> *(int *)0x1848204 = 0; /* MAR1 */
> >> *(int *)0x1848208 = 0; /* MAR2 */
> >> *(int *)0x184820c = 0; /* MAR3 */
> >>
> >> /* Disable EDMA events and interrupts and clear any
> >> * pending events.
> >> * GEL_TextOut("Disable EDMA event\n");
> >> */
> >> *(int *)0x01A0FFA8 = 0; /* CIERH */
> >> *(int *)0x01A0FFB4 = 0; /* EERH */
> >> *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
> >>
> >> *(int *)0x01A0FFE8 = 0; /* CIERL */
> >> *(int *)0x01A0FFF4 = 0; /* EERL */
> >> *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
> >>
> >> /* Disable other interrupts */
> >> IER = 0;
> >> IFR = 0;
> >> }
> >> /*--------------------------*/
> >> /* RESET MENU */
> >> /*--------------------------*/
> >> menuitem "Resets";
> >> hotmenu Reset_BreakPts_and_EMIF()
> >> {
> >> GEL_BreakPtReset();
> >> GEL_Reset();
> >> init_emif();
> >> }
> >> hotmenu Flush_Cache()
> >> {
> >> FlushCache();
> >> }
> >> /*--------------------------*/
> >> /* MEMORY MAP MENU */
> >> /*--------------------------*/
> >> menuitem "Memory Map";
> >> hotmenu SetMemoryMap()
> >> {
> >> setup_memory_map();
> >> }
> >> hotmenu ClearMemoryMap()
> >> {
> >> clear_memory_map();
> >> }
> >> /*--------------------------*/
> >> /* BOARD OPTIONS MENU */
> >> /*--------------------------*/
> >> menuitem "Board Options";
> >> #define CPLD_REVISION 0x9008001F
> >> hotmenu CheckFPGARevision()
> >> {
> >> GEL_TextOut(" FPGA Revision %d\n","Output",1,1,1, *(char *)CPLD_REVISION);
> >> GEL_TextOut(" Note: Revision only valid if FGPA DONE LED is on
> >> (DS9)\n","Output",1,1,1);
> >> }
> >>
> >> Q3. What is your target board??
> >> EVMDM642
> >> 720MHz
> >>
> >> ________________________________
> >> From: mikedunn
> >> To: Yi Guo
> >> Cc: c...
> >> Sent: Thu, February 17, 2011 3:21:51 AM
> >> Subject: Re: [c6x] problem with using clock() and printf()
> >>
> >>
> >> Yi Guo,
> >>
> >> OK, lets see if we can get a set of consistent symptoms.
> >> Note that the steps below apply to first and second generation C6000 devices
> >> [like 6201, 6713, 6416] in addition to the DM642. Do not use with C64+
> > devices.
> >> The following steps will are not likely to resolve your problem, but they
> will
> >> eliminate any doubts WRT extraneous interrupts and possible erratic reset
> >> behavior. IMO it is always good practice to initialize the interrupt vectors
> >> when troubleshooting [I plug them with breakpoints - if you get an unexpected
> >> interrupt, you know it right away].
> >> STEP 1:
> >> First a minor change to the .cmd file. add the 'VECS' and '.vectors' lines as
> >> shown below:
> >> --begin--
> >> MEMORY
> >> {
> >> VECS: org = 000h, len = 400h
> >> IRAM: org = 400h, len = 0FC00h
> >> }
> >> SECTIONS
> >> {
> >> .vectors :> VECS
> >> ------end of changes---
> >> STEP 2:
> >> Then add the code below to a file called 'vectors.asm'.
> >> Begin 'vectors.asm'---------
> >> ;
> >> ; Copyright 2003 by Texas Instruments Incorporated.
> >> ; All rights reserved. Property of Texas Instruments Incorporated.
> >> ; Restricted rights to use, duplicate or disclose this code are
> >> ; granted through contract.
> >> ;
> >> ;
> >> ; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
> >> ; hacked by mikedunn
> >> ;
> >
> >
> >
------- End of Original Message -------
_____________________________________
Reply by ●February 18, 20112011-02-18
Yi Guo,
What version of the CodeGen tools are you using?
mikedunn
On 2/17/2011 10:52 PM, Richard Williams wrote:
> Yi Guo,
>
> What did you expect to happen when the execution ran off the end of
> the program?
>
> R. Williams
>
> ---------- Original Message -----------
> From: Yi Guo >
> To: Jeff Brower > >, c...
>
> Sent: Thu, 17 Feb 2011 17:48:52 -0800 (PST)
> Subject: Re: [c6x] problem with using clock() and printf()
>
> > Hi, Jeff,
> > Ok, so you removed clock() and printf() -- as the only changes -- and
> > no error messages?
> > > Yes.
> >
> > The code after being changed:
> > #include
> > #include
> >
> > void main()
> > {
> > int j, a = 0;
> > clock_t start, finish;
> > double duration;
> > start = 1;//clock();
> > for (j = 0; j < 3; j++) {
> > a += 1;
> > }
> > finish = 8;//clock();
> > duration = (double)(finish -start) / CLOCKS_PER_SEC;
> > // printf("%f\n", duration);
> > }
> >
> > In this case you keep clock() and printf(), and add while (1) as last
> > line of code inside main(), and again, no errors?
> > >yes.
> >
> > The code after being changed:
> > #include
> > #include
> >
> > void main()
> > {
> > int j, a = 0;
> > clock_t start, finish;
> > double duration;
> > start = clock();
> > for (j = 0; j < 3; j++) {
> > a += 1;
> > }
> > finish = clock();
> > duration = (double)(finish -start) / CLOCKS_PER_SEC;
> > printf("%f\n", duration);
> > while(1);
> > }
> >
> > ________________________________
> > From: Jeff Brower > >
> > To: c...
> > Cc: Yi Guo >
> > Sent: Fri, February 18, 2011 8:30:05 AM
> > Subject: Re: [c6x] problem with using clock() and printf()
> >
> > Yi Guo-
> >
> > > Thenks. See the Q&As bellow.
> > >
> > > 1) This may have been asked already... did you try without
> clock() and
> > > printf()? With those lines commented, do you
> > > still get breakpoint-related error messages?
> > >>no, i don't.
> >
> > Ok, so you removed clock() and printf() -- as the only changes -- and
> > no error messages?
> >
> > > 2) If you add:
> > >
> > > while (1);
> > >
> > > as the last line, can the program run without errors?
> > >> yes, it runs well.
> >
> > In this case you keep clock() and printf(), and add while (1) as last
> > line of code inside main(), and again, no errors?
> >
> > -Jeff
> >
> > > ________________________________
> > > From: Jeff Brower > >
> > > To: c...
> > > Cc: Yi Guo >
> > > Sent: Thu, February 17, 2011 12:44:43 PM
> > > Subject: Re: [c6x] problem with using clock() and printf()
> > >
> > > Yi Guo-
> > >
> > >> void main()
> > >> {
> > >> int j, a = 0;
> > >> clock_t start, finish;
> > >> double duration;
> > >> start = clock();
> > >> for (j = 0; j < 3; j++) {
> > >> a += 1;
> > >> }
> > >> finish = clock();
> > >> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> > >> printf("%f\n", duration);
> > >> }
> > >
> > > 1) This may have been asked already... did you try without clock() and
> > > printf()? With those lines commented, do you
> > > still get breakpoint-related error messages?
> > >
> > > 2) If you add:
> > >
> > > while (1);
> > >
> > > as the last line, can the program run without errors?
> > >
> > > -Jeff
> > >
> > >
> > >> Mikedunn,
> > >>
> > >> Thank you for help.
> > >> I didn't find any optimization options were selected:
> > >> Build option-->compiler-->opt level-->noneBuild
> option-->compiler-->program
> > >> level opt-->none
> > >>
> > >> I followed the steps you provided to do some test for some times, I
> > >> always received an error message from CCS:
> > >> Error: Error 0x0000000C/-2044 Error during: Register, Break
> Point, No
> > >> breakpoint at 0x00007360
> > >>
> > >> Then here are Q&As.
> > >> Q1. If 0-4 is successful, repeat 1-4 a few times to make sure
> that results
> > are
> > >> consistent. results??
> > >> See the error message above.
> > >>
> > >> Q2. What are the contents of your GEL file?? paste in your next post.
> > >> /*----------------------*/
> > >> /* EVMDM642.gel */
> > >> /* Version 1.70 */
> > >> /*----------------------*/
> > >> /* The StartUp() function is called each time CCS is started. */
> > >> /* Customize this function to perform desired initialization. */
> > >> /*----------------------*/
> > >> StartUp()
> > >> {
> > >> setup_memory_map();
> > >> GEL_Reset();
> > >> init_emif();
> > >> }
> > >> /*----------------------*/
> > >> /* Setup memory map for DM642 EVM. */
> > >> /* */
> > >> /*----------------------*/
> > >> setup_memory_map()
> > >> {
> > >> GEL_MapOn();
> > >> GEL_MapReset();
> > >> /* On-chip memory map */
> > >> GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory */
> > >> GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS */
> > >> GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS */
> > >> GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS */
> > >> GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS */
> > >> GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS */
> > >> GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS */
> > >> GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS */
> > >> GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND
> PARAM */
> > >> GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS */
> > >> GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS */
> > >> GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS */
> > >> GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS */
> > >> GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device
> Configuration */
> > >> GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS */
> > >> GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS */
> > >> GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS */
> > >> GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS */
> > >> GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control */
> > >> GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control */
> > >> GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control */
> > >> GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS */
> > >> GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper */
> > >> GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS */
> > >> GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS */
> > >> GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS */
> > >> GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data,
> EDMA map */
> > >> GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data,
> EDMA map */
> > >> GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A
> Data */
> > >> GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B
> Data */
> > >> GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A
> Data */
> > >> GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B
> Data */
> > >> GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A
> Data */
> > >> GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B
> Data */
> > >> /* Off-chip memory map */
> > >> GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM
> EMIF-A, CE0*/
> > >> GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash
> EMIF-A, CE1 */
> > >> GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A,
> CE1 */
> > >> GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2
> EXPANSION */
> > >> GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3
> EXPANSION */
> > >> }
> > >> /*----------------------*/
> > >> /* init_emif() */
> > >> /*----------------------*/
> > >> init_emif()
> > >> {
> > >> #define EMIFA_GCTL 0x01800000
> > >> #define EMIFA_CE1 0x01800004
> > >> #define EMIFA_CE0 0x01800008
> > >> #define EMIFA_CE2 0x01800010
> > >> #define EMIFA_CE3 0x01800014
> > >> #define EMIFA_SDRAMCTL 0x01800018
> > >> #define EMIFA_SDRAMTIM 0x0180001c
> > >> #define EMIFA_SDRAMEXT 0x01800020
> > >> #define EMIFA_CE1SECCTL 0x01800044
> > >> #define EMIFA_CE0SECCTL 0x01800048
> > >> #define EMIFA_CE2SECCTL 0x01800050
> > >> #define EMIFA_CE3SECCTL 0x01800054
> > >>
> > >> /* EMIFA */
> > >> *(int *)EMIFA_GCTL = 0x00052078;
> > >> *(int *)EMIFA_CE0 = 0xffffffd3; /* CE0 SDRAM */
> > >> *(int *)EMIFA_CE1 = 0x73a28e01; /* CE1 Flash + CPLD */
> > >> *(int *)EMIFA_CE2 = 0x22a28a22; /* CE2 Daughtercard 32-bit
> async */
> > >> *(int *)EMIFA_CE3 = 0x22a28a42; /* CE3 Daughtercard 32-bit
> sync */
> > >> *(int *)EMIFA_SDRAMCTL = 0x57115000; /* SDRAM control */
> > >> *(int *)EMIFA_SDRAMTIM = 0x0000081b; /* SDRAM timing (refresh)
> */
> > >> *(int *)EMIFA_SDRAMEXT = 0x001faf4d; /* SDRAM extended control
> */
> > >> *(int *)EMIFA_CE0SECCTL= 0x00000002; /* CE0 Secondary Control
> Reg. */
> > >> *(int *)EMIFA_CE1SECCTL= 0x00000002; /* CE1 Secondary Control
> Reg. */
> > >> *(int *)EMIFA_CE2SECCTL= 0x00000002; /* CE2 Secondary Control
> Reg. */
> > >> *(int *)EMIFA_CE3SECCTL= 0x00000073; /* CE3 Secondary Control
> Reg. */
> > >> }
> > >> /*----------------------*/
> > >> /* clear_memory_map() */
> > >> /*----------------------*/
> > >> clear_memory_map()
> > >> {
> > >> GEL_MapOff();
> > >> }
> > >> /*----------------------*/
> > >> /* FlushCache() */
> > >> /*----------------------*/
> > >> FlushCache()
> > >> {
> > >> /* Invalidate L1I and L1D */
> > >> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
> > >>
> > >> /* Clean L2 */
> > >> *(int *)0x01845004 = 0x1;
> > >> }
> > >>
> > >> /*----------------------*/
> > >> /* OnReset() */
> > >> /*----------------------*/
> > >> OnReset(int nErrorCode)
> > >> {
> > >> init_emif();
> > >> }
> > >>
> > >> /*----------------------*/
> > >> /* OnPreFileLoaded() */
> > >> /* This function is called automatically when the 'Load Program'*/
> > >> /* Menu item is selected. */
> > >> /*----------------------*/
> > >> OnPreFileLoaded()
> > >> {
> > >> /* GEL_Reset(); -- Commented out for CCS 2.20 */
> > >> FlushCache();
> > >> IER = 0;
> > >> IFR = 0;
> > >> init_emif();
> > >> }
> > >> /*----------------------*/
> > >> /* OnRestart() */
> > >> /* This function is called by CCS when you do Debug->Restart. */
> > >> /* The goal is to put the C6x into a known good state with */
> > >> /* respect to cache, edma and interrupts. */
> > >> /* Failure to do this can cause problems when you restart and */
> > >> /* run your application code multiple times. This is different */
> > >> /* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
> > >> /* C6x into a known good state. */
> > >> /*----------------------*/
> > >> OnRestart(int nErrorCode )
> > >> {
> > >> /* Turn off L2 for all EMIFA CE spaces. App should
> > >> * manage these for coherancy in the application.
> > >> * GEL_TextOut("Turn off cache segment\n");
> > >> */
> > >> *(int *)0x1848200 = 0; /* MAR0 */
> > >> *(int *)0x1848204 = 0; /* MAR1 */
> > >> *(int *)0x1848208 = 0; /* MAR2 */
> > >> *(int *)0x184820c = 0; /* MAR3 */
> > >>
> > >> /* Disable EDMA events and interrupts and clear any
> > >> * pending events.
> > >> * GEL_TextOut("Disable EDMA event\n");
> > >> */
> > >> *(int *)0x01A0FFA8 = 0; /* CIERH */
> > >> *(int *)0x01A0FFB4 = 0; /* EERH */
> > >> *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
> > >>
> > >> *(int *)0x01A0FFE8 = 0; /* CIERL */
> > >> *(int *)0x01A0FFF4 = 0; /* EERL */
> > >> *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
> > >>
> > >> /* Disable other interrupts */
> > >> IER = 0;
> > >> IFR = 0;
> > >> }
> > >> /*----------------------*/
> > >> /* RESET MENU */
> > >> /*----------------------*/
> > >> menuitem "Resets";
> > >> hotmenu Reset_BreakPts_and_EMIF()
> > >> {
> > >> GEL_BreakPtReset();
> > >> GEL_Reset();
> > >> init_emif();
> > >> }
> > >> hotmenu Flush_Cache()
> > >> {
> > >> FlushCache();
> > >> }
> > >> /*----------------------*/
> > >> /* MEMORY MAP MENU */
> > >> /*----------------------*/
> > >> menuitem "Memory Map";
> > >> hotmenu SetMemoryMap()
> > >> {
> > >> setup_memory_map();
> > >> }
> > >> hotmenu ClearMemoryMap()
> > >> {
> > >> clear_memory_map();
> > >> }
> > >> /*----------------------*/
> > >> /* BOARD OPTIONS MENU */
> > >> /*----------------------*/
> > >> menuitem "Board Options";
> > >> #define CPLD_REVISION 0x9008001F
> > >> hotmenu CheckFPGARevision()
> > >> {
> > >> GEL_TextOut(" FPGA Revision %d\n","Output",1,1,1, *(char
> *)CPLD_REVISION);
> > >> GEL_TextOut(" Note: Revision only valid if FGPA DONE LED is on
> > >> (DS9)\n","Output",1,1,1);
> > >> }
> > >>
> > >> Q3. What is your target board??
> > >> EVMDM642
> > >> 720MHz
> > >>
> > >> ________________________________
> > >> From: mikedunn > >
> > >> To: Yi Guo >
> > >> Cc: c...
> > >> Sent: Thu, February 17, 2011 3:21:51 AM
> > >> Subject: Re: [c6x] problem with using clock() and printf()
> > >>
> > >>
> > >> Yi Guo,
> > >>
> > >> OK, lets see if we can get a set of consistent symptoms.
> > >> Note that the steps below apply to first and second generation
> C6000 devices
> > >> [like 6201, 6713, 6416] in addition to the DM642. Do not use with
> C64+
> > > devices.
> > >> The following steps will are not likely to resolve your problem,
> but they
> > will
> > >> eliminate any doubts WRT extraneous interrupts and possible
> erratic reset
> > >> behavior. IMO it is always good practice to initialize the
> interrupt vectors
> > >> when troubleshooting [I plug them with breakpoints - if you get
> an unexpected
> > >> interrupt, you know it right away].
> > >> STEP 1:
> > >> First a minor change to the .cmd file. add the 'VECS' and
> '.vectors' lines as
> > >> shown below:
> > >> --begin--
> > >> MEMORY
> > >> {
> > >> VECS: org = 000h, len = 400h
> > >> IRAM: org = 400h, len = 0FC00h
> > >> }
> > >> SECTIONS
> > >> {
> > >> .vectors :> VECS
> > >> ------end of changes---
> > >> STEP 2:
> > >> Then add the code below to a file called 'vectors.asm'.
> > >> Begin 'vectors.asm'---------
> > >> ;
> > >> ; Copyright 2003 by Texas Instruments Incorporated.
> > >> ; All rights reserved. Property of Texas Instruments Incorporated.
> > >> ; Restricted rights to use, duplicate or disclose this code are
> > >> ; granted through contract.
> > >> ;
> > >> ;
> > >> ; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
> > >> ; hacked by mikedunn
> > >> ;
> > >
> > >
> > >
> ------- End of Original Message -------
What version of the CodeGen tools are you using?
mikedunn
On 2/17/2011 10:52 PM, Richard Williams wrote:
> Yi Guo,
>
> What did you expect to happen when the execution ran off the end of
> the program?
>
> R. Williams
>
> ---------- Original Message -----------
> From: Yi Guo >
> To: Jeff Brower > >, c...
>
> Sent: Thu, 17 Feb 2011 17:48:52 -0800 (PST)
> Subject: Re: [c6x] problem with using clock() and printf()
>
> > Hi, Jeff,
> > Ok, so you removed clock() and printf() -- as the only changes -- and
> > no error messages?
> > > Yes.
> >
> > The code after being changed:
> > #include
> > #include
> >
> > void main()
> > {
> > int j, a = 0;
> > clock_t start, finish;
> > double duration;
> > start = 1;//clock();
> > for (j = 0; j < 3; j++) {
> > a += 1;
> > }
> > finish = 8;//clock();
> > duration = (double)(finish -start) / CLOCKS_PER_SEC;
> > // printf("%f\n", duration);
> > }
> >
> > In this case you keep clock() and printf(), and add while (1) as last
> > line of code inside main(), and again, no errors?
> > >yes.
> >
> > The code after being changed:
> > #include
> > #include
> >
> > void main()
> > {
> > int j, a = 0;
> > clock_t start, finish;
> > double duration;
> > start = clock();
> > for (j = 0; j < 3; j++) {
> > a += 1;
> > }
> > finish = clock();
> > duration = (double)(finish -start) / CLOCKS_PER_SEC;
> > printf("%f\n", duration);
> > while(1);
> > }
> >
> > ________________________________
> > From: Jeff Brower > >
> > To: c...
> > Cc: Yi Guo >
> > Sent: Fri, February 18, 2011 8:30:05 AM
> > Subject: Re: [c6x] problem with using clock() and printf()
> >
> > Yi Guo-
> >
> > > Thenks. See the Q&As bellow.
> > >
> > > 1) This may have been asked already... did you try without
> clock() and
> > > printf()? With those lines commented, do you
> > > still get breakpoint-related error messages?
> > >>no, i don't.
> >
> > Ok, so you removed clock() and printf() -- as the only changes -- and
> > no error messages?
> >
> > > 2) If you add:
> > >
> > > while (1);
> > >
> > > as the last line, can the program run without errors?
> > >> yes, it runs well.
> >
> > In this case you keep clock() and printf(), and add while (1) as last
> > line of code inside main(), and again, no errors?
> >
> > -Jeff
> >
> > > ________________________________
> > > From: Jeff Brower > >
> > > To: c...
> > > Cc: Yi Guo >
> > > Sent: Thu, February 17, 2011 12:44:43 PM
> > > Subject: Re: [c6x] problem with using clock() and printf()
> > >
> > > Yi Guo-
> > >
> > >> void main()
> > >> {
> > >> int j, a = 0;
> > >> clock_t start, finish;
> > >> double duration;
> > >> start = clock();
> > >> for (j = 0; j < 3; j++) {
> > >> a += 1;
> > >> }
> > >> finish = clock();
> > >> duration = (double)(finish -start) / CLOCKS_PER_SEC;
> > >> printf("%f\n", duration);
> > >> }
> > >
> > > 1) This may have been asked already... did you try without clock() and
> > > printf()? With those lines commented, do you
> > > still get breakpoint-related error messages?
> > >
> > > 2) If you add:
> > >
> > > while (1);
> > >
> > > as the last line, can the program run without errors?
> > >
> > > -Jeff
> > >
> > >
> > >> Mikedunn,
> > >>
> > >> Thank you for help.
> > >> I didn't find any optimization options were selected:
> > >> Build option-->compiler-->opt level-->noneBuild
> option-->compiler-->program
> > >> level opt-->none
> > >>
> > >> I followed the steps you provided to do some test for some times, I
> > >> always received an error message from CCS:
> > >> Error: Error 0x0000000C/-2044 Error during: Register, Break
> Point, No
> > >> breakpoint at 0x00007360
> > >>
> > >> Then here are Q&As.
> > >> Q1. If 0-4 is successful, repeat 1-4 a few times to make sure
> that results
> > are
> > >> consistent. results??
> > >> See the error message above.
> > >>
> > >> Q2. What are the contents of your GEL file?? paste in your next post.
> > >> /*----------------------*/
> > >> /* EVMDM642.gel */
> > >> /* Version 1.70 */
> > >> /*----------------------*/
> > >> /* The StartUp() function is called each time CCS is started. */
> > >> /* Customize this function to perform desired initialization. */
> > >> /*----------------------*/
> > >> StartUp()
> > >> {
> > >> setup_memory_map();
> > >> GEL_Reset();
> > >> init_emif();
> > >> }
> > >> /*----------------------*/
> > >> /* Setup memory map for DM642 EVM. */
> > >> /* */
> > >> /*----------------------*/
> > >> setup_memory_map()
> > >> {
> > >> GEL_MapOn();
> > >> GEL_MapReset();
> > >> /* On-chip memory map */
> > >> GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory */
> > >> GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS */
> > >> GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS */
> > >> GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS */
> > >> GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS */
> > >> GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS */
> > >> GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS */
> > >> GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS */
> > >> GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND
> PARAM */
> > >> GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS */
> > >> GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS */
> > >> GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS */
> > >> GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS */
> > >> GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device
> Configuration */
> > >> GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS */
> > >> GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS */
> > >> GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS */
> > >> GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS */
> > >> GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control */
> > >> GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control */
> > >> GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control */
> > >> GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS */
> > >> GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper */
> > >> GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS */
> > >> GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS */
> > >> GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS */
> > >> GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data,
> EDMA map */
> > >> GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data,
> EDMA map */
> > >> GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A
> Data */
> > >> GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B
> Data */
> > >> GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A
> Data */
> > >> GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B
> Data */
> > >> GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A
> Data */
> > >> GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B
> Data */
> > >> /* Off-chip memory map */
> > >> GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM
> EMIF-A, CE0*/
> > >> GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash
> EMIF-A, CE1 */
> > >> GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A,
> CE1 */
> > >> GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2
> EXPANSION */
> > >> GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3
> EXPANSION */
> > >> }
> > >> /*----------------------*/
> > >> /* init_emif() */
> > >> /*----------------------*/
> > >> init_emif()
> > >> {
> > >> #define EMIFA_GCTL 0x01800000
> > >> #define EMIFA_CE1 0x01800004
> > >> #define EMIFA_CE0 0x01800008
> > >> #define EMIFA_CE2 0x01800010
> > >> #define EMIFA_CE3 0x01800014
> > >> #define EMIFA_SDRAMCTL 0x01800018
> > >> #define EMIFA_SDRAMTIM 0x0180001c
> > >> #define EMIFA_SDRAMEXT 0x01800020
> > >> #define EMIFA_CE1SECCTL 0x01800044
> > >> #define EMIFA_CE0SECCTL 0x01800048
> > >> #define EMIFA_CE2SECCTL 0x01800050
> > >> #define EMIFA_CE3SECCTL 0x01800054
> > >>
> > >> /* EMIFA */
> > >> *(int *)EMIFA_GCTL = 0x00052078;
> > >> *(int *)EMIFA_CE0 = 0xffffffd3; /* CE0 SDRAM */
> > >> *(int *)EMIFA_CE1 = 0x73a28e01; /* CE1 Flash + CPLD */
> > >> *(int *)EMIFA_CE2 = 0x22a28a22; /* CE2 Daughtercard 32-bit
> async */
> > >> *(int *)EMIFA_CE3 = 0x22a28a42; /* CE3 Daughtercard 32-bit
> sync */
> > >> *(int *)EMIFA_SDRAMCTL = 0x57115000; /* SDRAM control */
> > >> *(int *)EMIFA_SDRAMTIM = 0x0000081b; /* SDRAM timing (refresh)
> */
> > >> *(int *)EMIFA_SDRAMEXT = 0x001faf4d; /* SDRAM extended control
> */
> > >> *(int *)EMIFA_CE0SECCTL= 0x00000002; /* CE0 Secondary Control
> Reg. */
> > >> *(int *)EMIFA_CE1SECCTL= 0x00000002; /* CE1 Secondary Control
> Reg. */
> > >> *(int *)EMIFA_CE2SECCTL= 0x00000002; /* CE2 Secondary Control
> Reg. */
> > >> *(int *)EMIFA_CE3SECCTL= 0x00000073; /* CE3 Secondary Control
> Reg. */
> > >> }
> > >> /*----------------------*/
> > >> /* clear_memory_map() */
> > >> /*----------------------*/
> > >> clear_memory_map()
> > >> {
> > >> GEL_MapOff();
> > >> }
> > >> /*----------------------*/
> > >> /* FlushCache() */
> > >> /*----------------------*/
> > >> FlushCache()
> > >> {
> > >> /* Invalidate L1I and L1D */
> > >> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
> > >>
> > >> /* Clean L2 */
> > >> *(int *)0x01845004 = 0x1;
> > >> }
> > >>
> > >> /*----------------------*/
> > >> /* OnReset() */
> > >> /*----------------------*/
> > >> OnReset(int nErrorCode)
> > >> {
> > >> init_emif();
> > >> }
> > >>
> > >> /*----------------------*/
> > >> /* OnPreFileLoaded() */
> > >> /* This function is called automatically when the 'Load Program'*/
> > >> /* Menu item is selected. */
> > >> /*----------------------*/
> > >> OnPreFileLoaded()
> > >> {
> > >> /* GEL_Reset(); -- Commented out for CCS 2.20 */
> > >> FlushCache();
> > >> IER = 0;
> > >> IFR = 0;
> > >> init_emif();
> > >> }
> > >> /*----------------------*/
> > >> /* OnRestart() */
> > >> /* This function is called by CCS when you do Debug->Restart. */
> > >> /* The goal is to put the C6x into a known good state with */
> > >> /* respect to cache, edma and interrupts. */
> > >> /* Failure to do this can cause problems when you restart and */
> > >> /* run your application code multiple times. This is different */
> > >> /* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
> > >> /* C6x into a known good state. */
> > >> /*----------------------*/
> > >> OnRestart(int nErrorCode )
> > >> {
> > >> /* Turn off L2 for all EMIFA CE spaces. App should
> > >> * manage these for coherancy in the application.
> > >> * GEL_TextOut("Turn off cache segment\n");
> > >> */
> > >> *(int *)0x1848200 = 0; /* MAR0 */
> > >> *(int *)0x1848204 = 0; /* MAR1 */
> > >> *(int *)0x1848208 = 0; /* MAR2 */
> > >> *(int *)0x184820c = 0; /* MAR3 */
> > >>
> > >> /* Disable EDMA events and interrupts and clear any
> > >> * pending events.
> > >> * GEL_TextOut("Disable EDMA event\n");
> > >> */
> > >> *(int *)0x01A0FFA8 = 0; /* CIERH */
> > >> *(int *)0x01A0FFB4 = 0; /* EERH */
> > >> *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
> > >>
> > >> *(int *)0x01A0FFE8 = 0; /* CIERL */
> > >> *(int *)0x01A0FFF4 = 0; /* EERL */
> > >> *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
> > >>
> > >> /* Disable other interrupts */
> > >> IER = 0;
> > >> IFR = 0;
> > >> }
> > >> /*----------------------*/
> > >> /* RESET MENU */
> > >> /*----------------------*/
> > >> menuitem "Resets";
> > >> hotmenu Reset_BreakPts_and_EMIF()
> > >> {
> > >> GEL_BreakPtReset();
> > >> GEL_Reset();
> > >> init_emif();
> > >> }
> > >> hotmenu Flush_Cache()
> > >> {
> > >> FlushCache();
> > >> }
> > >> /*----------------------*/
> > >> /* MEMORY MAP MENU */
> > >> /*----------------------*/
> > >> menuitem "Memory Map";
> > >> hotmenu SetMemoryMap()
> > >> {
> > >> setup_memory_map();
> > >> }
> > >> hotmenu ClearMemoryMap()
> > >> {
> > >> clear_memory_map();
> > >> }
> > >> /*----------------------*/
> > >> /* BOARD OPTIONS MENU */
> > >> /*----------------------*/
> > >> menuitem "Board Options";
> > >> #define CPLD_REVISION 0x9008001F
> > >> hotmenu CheckFPGARevision()
> > >> {
> > >> GEL_TextOut(" FPGA Revision %d\n","Output",1,1,1, *(char
> *)CPLD_REVISION);
> > >> GEL_TextOut(" Note: Revision only valid if FGPA DONE LED is on
> > >> (DS9)\n","Output",1,1,1);
> > >> }
> > >>
> > >> Q3. What is your target board??
> > >> EVMDM642
> > >> 720MHz
> > >>
> > >> ________________________________
> > >> From: mikedunn > >
> > >> To: Yi Guo >
> > >> Cc: c...
> > >> Sent: Thu, February 17, 2011 3:21:51 AM
> > >> Subject: Re: [c6x] problem with using clock() and printf()
> > >>
> > >>
> > >> Yi Guo,
> > >>
> > >> OK, lets see if we can get a set of consistent symptoms.
> > >> Note that the steps below apply to first and second generation
> C6000 devices
> > >> [like 6201, 6713, 6416] in addition to the DM642. Do not use with
> C64+
> > > devices.
> > >> The following steps will are not likely to resolve your problem,
> but they
> > will
> > >> eliminate any doubts WRT extraneous interrupts and possible
> erratic reset
> > >> behavior. IMO it is always good practice to initialize the
> interrupt vectors
> > >> when troubleshooting [I plug them with breakpoints - if you get
> an unexpected
> > >> interrupt, you know it right away].
> > >> STEP 1:
> > >> First a minor change to the .cmd file. add the 'VECS' and
> '.vectors' lines as
> > >> shown below:
> > >> --begin--
> > >> MEMORY
> > >> {
> > >> VECS: org = 000h, len = 400h
> > >> IRAM: org = 400h, len = 0FC00h
> > >> }
> > >> SECTIONS
> > >> {
> > >> .vectors :> VECS
> > >> ------end of changes---
> > >> STEP 2:
> > >> Then add the code below to a file called 'vectors.asm'.
> > >> Begin 'vectors.asm'---------
> > >> ;
> > >> ; Copyright 2003 by Texas Instruments Incorporated.
> > >> ; All rights reserved. Property of Texas Instruments Incorporated.
> > >> ; Restricted rights to use, duplicate or disclose this code are
> > >> ; granted through contract.
> > >> ;
> > >> ;
> > >> ; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
> > >> ; hacked by mikedunn
> > >> ;
> > >
> > >
> > >
> ------- End of Original Message -------
Reply by ●February 18, 20112011-02-18
Richard-
> What did you expect to happen when the execution ran off
> the end of the program?
Yes I agree, to "exit main" is generally not a good idea in the TI environment. But it shouldn't cause mysterious
target/emulator errors unless something is wrong with the C$$EXIT vector. As I recall, in a DSP/BIOS-enabled program,
doing this takes you back to some type of idle loop and DSP/BIOS is no longer active (at least in the sense of
processing timer ticks). But in either case, the emulator should still work fine and it should be no problem to see
where you are and what code is executing.
Yi, my suggestion is to keep the while (1) as last line of main() as a work-around. Like a safety net.
Mike or other TI tools experts on the forum may have some idea of exactly what is wrong. But in our lab, we would
consider this as "fixed" with a work-around that prevents main() from a final exit. After all, you can always do a
"Reset CPU" and re-run your code from that point.
-Jeff
> ---------- Original Message -----------
> From: Yi Guo
> To: Jeff Brower , c...
> Sent: Thu, 17 Feb 2011 17:48:52 -0800 (PST)
> Subject: Re: [c6x] problem with using clock() and printf()
>
>> Hi, Jeff,
>> Ok, so you removed clock() and printf() -- as the only changes -- and
>> no error messages?
>> > Yes.
>>
>> The code after being changed:
>> #include
>> #include
>>
>> void main()
>> {
>> int j, a = 0;
>> clock_t start, finish;
>> double duration;
>> start = 1;//clock();
>> for (j = 0; j < 3; j++) {
>> a += 1;
>> }
>> finish = 8;//clock();
>> duration = (double)(finish -start) / CLOCKS_PER_SEC;
>> // printf("%f\n", duration);
>> }
>>
>> In this case you keep clock() and printf(), and add while (1) as last
>> line of code inside main(), and again, no errors?
>> >yes.
>>
>> The code after being changed:
>> #include
>> #include
>>
>> void main()
>> {
>> int j, a = 0;
>> clock_t start, finish;
>> double duration;
>> start = clock();
>> for (j = 0; j < 3; j++) {
>> a += 1;
>> }
>> finish = clock();
>> duration = (double)(finish -start) / CLOCKS_PER_SEC;
>> printf("%f\n", duration);
>> while(1);
>> }
>>
>> ________________________________
>> From: Jeff Brower
>> To: c...
>> Cc: Yi Guo
>> Sent: Fri, February 18, 2011 8:30:05 AM
>> Subject: Re: [c6x] problem with using clock() and printf()
>>
>> Yi Guo-
>>
>> > Thenks. See the Q&As bellow.
>> >
>> > 1) This may have been asked already... did you try without clock() and
>> > printf()? With those lines commented, do you
>> > still get breakpoint-related error messages?
>> >>no, i don't.
>>
>> Ok, so you removed clock() and printf() -- as the only changes -- and
>> no error messages?
>>
>> > 2) If you add:
>> >
>> > while (1);
>> >
>> > as the last line, can the program run without errors?
>> >> yes, it runs well.
>>
>> In this case you keep clock() and printf(), and add while (1) as last
>> line of code inside main(), and again, no errors?
>>
>> -Jeff
>>
>> > ________________________________
>> > From: Jeff Brower
>> > To: c...
>> > Cc: Yi Guo
>> > Sent: Thu, February 17, 2011 12:44:43 PM
>> > Subject: Re: [c6x] problem with using clock() and printf()
>> >
>> > Yi Guo-
>> >
>> >> void main()
>> >> {
>> >> int j, a = 0;
>> >> clock_t start, finish;
>> >> double duration;
>> >> start = clock();
>> >> for (j = 0; j < 3; j++) {
>> >> a += 1;
>> >> }
>> >> finish = clock();
>> >> duration = (double)(finish -start) / CLOCKS_PER_SEC;
>> >> printf("%f\n", duration);
>> >> }
>> >
>> > 1) This may have been asked already... did you try without clock() and
>> > printf()? With those lines commented, do you
>> > still get breakpoint-related error messages?
>> >
>> > 2) If you add:
>> >
>> > while (1);
>> >
>> > as the last line, can the program run without errors?
>> >
>> > -Jeff
>> >
>> >
>> >> Mikedunn,
>> >>
>> >> Thank you for help.
>> >> I didn't find any optimization options were selected:
>> >> Build option-->compiler-->opt level-->noneBuild option-->compiler-->program
>> >> level opt-->none
>> >>
>> >> I followed the steps you provided to do some test for some times, I
>> >> always received an error message from CCS:
>> >> Error: Error 0x0000000C/-2044 Error during: Register, Break Point, No
>> >> breakpoint at 0x00007360
>> >>
>> >> Then here are Q&As.
>> >> Q1. If 0-4 is successful, repeat 1-4 a few times to make sure that results
>> are
>> >> consistent. results??
>> >> See the error message above.
>> >>
>> >> Q2. What are the contents of your GEL file?? paste in your next post.
>> >> /*--------------------------*/
>> >> /* EVMDM642.gel */
>> >> /* Version 1.70 */
>> >> /*--------------------------*/
>> >> /* The StartUp() function is called each time CCS is started. */
>> >> /* Customize this function to perform desired initialization. */
>> >> /*--------------------------*/
>> >> StartUp()
>> >> {
>> >> setup_memory_map();
>> >> GEL_Reset();
>> >> init_emif();
>> >> }
>> >> /*--------------------------*/
>> >> /* Setup memory map for DM642 EVM. */
>> >> /* */
>> >> /*--------------------------*/
>> >> setup_memory_map()
>> >> {
>> >> GEL_MapOn();
>> >> GEL_MapReset();
>> >> /* On-chip memory map */
>> >> GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory */
>> >> GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS */
>> >> GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS */
>> >> GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS */
>> >> GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS */
>> >> GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS */
>> >> GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS */
>> >> GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS */
>> >> GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND PARAM */
>> >> GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS */
>> >> GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS */
>> >> GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS */
>> >> GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS */
>> >> GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device Configuration */
>> >> GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS */
>> >> GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS */
>> >> GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS */
>> >> GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS */
>> >> GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control */
>> >> GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control */
>> >> GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control */
>> >> GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS */
>> >> GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper */
>> >> GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS */
>> >> GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS */
>> >> GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS */
>> >> GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data, EDMA map */
>> >> GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data, EDMA map */
>> >> GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A Data */
>> >> GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B Data */
>> >> GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A Data */
>> >> GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B Data */
>> >> GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A Data */
>> >> GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B Data */
>> >> /* Off-chip memory map */
>> >> GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM EMIF-A, CE0*/
>> >> GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash EMIF-A, CE1 */
>> >> GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A, CE1 */
>> >> GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2 EXPANSION */
>> >> GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3 EXPANSION */
>> >> }
>> >> /*--------------------------*/
>> >> /* init_emif() */
>> >> /*--------------------------*/
>> >> init_emif()
>> >> {
>> >> #define EMIFA_GCTL 0x01800000
>> >> #define EMIFA_CE1 0x01800004
>> >> #define EMIFA_CE0 0x01800008
>> >> #define EMIFA_CE2 0x01800010
>> >> #define EMIFA_CE3 0x01800014
>> >> #define EMIFA_SDRAMCTL 0x01800018
>> >> #define EMIFA_SDRAMTIM 0x0180001c
>> >> #define EMIFA_SDRAMEXT 0x01800020
>> >> #define EMIFA_CE1SECCTL 0x01800044
>> >> #define EMIFA_CE0SECCTL 0x01800048
>> >> #define EMIFA_CE2SECCTL 0x01800050
>> >> #define EMIFA_CE3SECCTL 0x01800054
>> >>
>> >> /* EMIFA */
>> >> *(int *)EMIFA_GCTL = 0x00052078;
>> >> *(int *)EMIFA_CE0 = 0xffffffd3; /* CE0 SDRAM */
>> >> *(int *)EMIFA_CE1 = 0x73a28e01; /* CE1 Flash + CPLD */
>> >> *(int *)EMIFA_CE2 = 0x22a28a22; /* CE2 Daughtercard 32-bit async */
>> >> *(int *)EMIFA_CE3 = 0x22a28a42; /* CE3 Daughtercard 32-bit sync */
>> >> *(int *)EMIFA_SDRAMCTL = 0x57115000; /* SDRAM control */
>> >> *(int *)EMIFA_SDRAMTIM = 0x0000081b; /* SDRAM timing (refresh) */
>> >> *(int *)EMIFA_SDRAMEXT = 0x001faf4d; /* SDRAM extended control */
>> >> *(int *)EMIFA_CE0SECCTL= 0x00000002; /* CE0 Secondary Control Reg. */
>> >> *(int *)EMIFA_CE1SECCTL= 0x00000002; /* CE1 Secondary Control Reg. */
>> >> *(int *)EMIFA_CE2SECCTL= 0x00000002; /* CE2 Secondary Control Reg. */
>> >> *(int *)EMIFA_CE3SECCTL= 0x00000073; /* CE3 Secondary Control Reg. */
>> >> }
>> >> /*--------------------------*/
>> >> /* clear_memory_map() */
>> >> /*--------------------------*/
>> >> clear_memory_map()
>> >> {
>> >> GEL_MapOff();
>> >> }
>> >> /*--------------------------*/
>> >> /* FlushCache() */
>> >> /*--------------------------*/
>> >> FlushCache()
>> >> {
>> >> /* Invalidate L1I and L1D */
>> >> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
>> >>
>> >> /* Clean L2 */
>> >> *(int *)0x01845004 = 0x1;
>> >> }
>> >>
>> >> /*--------------------------*/
>> >> /* OnReset() */
>> >> /*--------------------------*/
>> >> OnReset(int nErrorCode)
>> >> {
>> >> init_emif();
>> >> }
>> >>
>> >> /*--------------------------*/
>> >> /* OnPreFileLoaded() */
>> >> /* This function is called automatically when the 'Load Program'*/
>> >> /* Menu item is selected. */
>> >> /*--------------------------*/
>> >> OnPreFileLoaded()
>> >> {
>> >> /* GEL_Reset(); -- Commented out for CCS 2.20 */
>> >> FlushCache();
>> >> IER = 0;
>> >> IFR = 0;
>> >> init_emif();
>> >> }
>> >> /*--------------------------*/
>> >> /* OnRestart() */
>> >> /* This function is called by CCS when you do Debug->Restart. */
>> >> /* The goal is to put the C6x into a known good state with */
>> >> /* respect to cache, edma and interrupts. */
>> >> /* Failure to do this can cause problems when you restart and */
>> >> /* run your application code multiple times. This is different */
>> >> /* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
>> >> /* C6x into a known good state. */
>> >> /*--------------------------*/
>> >> OnRestart(int nErrorCode )
>> >> {
>> >> /* Turn off L2 for all EMIFA CE spaces. App should
>> >> * manage these for coherancy in the application.
>> >> * GEL_TextOut("Turn off cache segment\n");
>> >> */
>> >> *(int *)0x1848200 = 0; /* MAR0 */
>> >> *(int *)0x1848204 = 0; /* MAR1 */
>> >> *(int *)0x1848208 = 0; /* MAR2 */
>> >> *(int *)0x184820c = 0; /* MAR3 */
>> >>
>> >> /* Disable EDMA events and interrupts and clear any
>> >> * pending events.
>> >> * GEL_TextOut("Disable EDMA event\n");
>> >> */
>> >> *(int *)0x01A0FFA8 = 0; /* CIERH */
>> >> *(int *)0x01A0FFB4 = 0; /* EERH */
>> >> *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
>> >>
>> >> *(int *)0x01A0FFE8 = 0; /* CIERL */
>> >> *(int *)0x01A0FFF4 = 0; /* EERL */
>> >> *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
>> >>
>> >> /* Disable other interrupts */
>> >> IER = 0;
>> >> IFR = 0;
>> >> }
>> >> /*--------------------------*/
>> >> /* RESET MENU */
>> >> /*--------------------------*/
>> >> menuitem "Resets";
>> >> hotmenu Reset_BreakPts_and_EMIF()
>> >> {
>> >> GEL_BreakPtReset();
>> >> GEL_Reset();
>> >> init_emif();
>> >> }
>> >> hotmenu Flush_Cache()
>> >> {
>> >> FlushCache();
>> >> }
>> >> /*--------------------------*/
>> >> /* MEMORY MAP MENU */
>> >> /*--------------------------*/
>> >> menuitem "Memory Map";
>> >> hotmenu SetMemoryMap()
>> >> {
>> >> setup_memory_map();
>> >> }
>> >> hotmenu ClearMemoryMap()
>> >> {
>> >> clear_memory_map();
>> >> }
>> >> /*--------------------------*/
>> >> /* BOARD OPTIONS MENU */
>> >> /*--------------------------*/
>> >> menuitem "Board Options";
>> >> #define CPLD_REVISION 0x9008001F
>> >> hotmenu CheckFPGARevision()
>> >> {
>> >> GEL_TextOut(" FPGA Revision %d\n","Output",1,1,1, *(char *)CPLD_REVISION);
>> >> GEL_TextOut(" Note: Revision only valid if FGPA DONE LED is on
>> >> (DS9)\n","Output",1,1,1);
>> >> }
>> >>
>> >> Q3. What is your target board??
>> >> EVMDM642
>> >> 720MHz
>> >>
>> >> ________________________________
>> >> From: mikedunn
>> >> To: Yi Guo
>> >> Cc: c...
>> >> Sent: Thu, February 17, 2011 3:21:51 AM
>> >> Subject: Re: [c6x] problem with using clock() and printf()
>> >>
>> >>
>> >> Yi Guo,
>> >>
>> >> OK, lets see if we can get a set of consistent symptoms.
>> >> Note that the steps below apply to first and second generation C6000 devices
>> >> [like 6201, 6713, 6416] in addition to the DM642. Do not use with C64+
>> > devices.
>> >> The following steps will are not likely to resolve your problem, but they
>> will
>> >> eliminate any doubts WRT extraneous interrupts and possible erratic reset
>> >> behavior. IMO it is always good practice to initialize the interrupt vectors
>> >> when troubleshooting [I plug them with breakpoints - if you get an unexpected
>> >> interrupt, you know it right away].
>> >> STEP 1:
>> >> First a minor change to the .cmd file. add the 'VECS' and '.vectors' lines as
>> >> shown below:
>> >> --begin--
>> >> MEMORY
>> >> {
>> >> VECS: org = 000h, len = 400h
>> >> IRAM: org = 400h, len = 0FC00h
>> >> }
>> >> SECTIONS
>> >> {
>> >> .vectors :> VECS
>> >> ------end of changes---
>> >> STEP 2:
>> >> Then add the code below to a file called 'vectors.asm'.
>> >> Begin 'vectors.asm'---------
>> >> ;
>> >> ; Copyright 2003 by Texas Instruments Incorporated.
>> >> ; All rights reserved. Property of Texas Instruments Incorporated.
>> >> ; Restricted rights to use, duplicate or disclose this code are
>> >> ; granted through contract.
>> >> ;
>> >> ;
>> >> ; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
>> >> ; hacked by mikedunn
>> >> ;
>> >
>> >
>> >
> ------- End of Original Message -------
_____________________________________
> What did you expect to happen when the execution ran off
> the end of the program?
Yes I agree, to "exit main" is generally not a good idea in the TI environment. But it shouldn't cause mysterious
target/emulator errors unless something is wrong with the C$$EXIT vector. As I recall, in a DSP/BIOS-enabled program,
doing this takes you back to some type of idle loop and DSP/BIOS is no longer active (at least in the sense of
processing timer ticks). But in either case, the emulator should still work fine and it should be no problem to see
where you are and what code is executing.
Yi, my suggestion is to keep the while (1) as last line of main() as a work-around. Like a safety net.
Mike or other TI tools experts on the forum may have some idea of exactly what is wrong. But in our lab, we would
consider this as "fixed" with a work-around that prevents main() from a final exit. After all, you can always do a
"Reset CPU" and re-run your code from that point.
-Jeff
> ---------- Original Message -----------
> From: Yi Guo
> To: Jeff Brower , c...
> Sent: Thu, 17 Feb 2011 17:48:52 -0800 (PST)
> Subject: Re: [c6x] problem with using clock() and printf()
>
>> Hi, Jeff,
>> Ok, so you removed clock() and printf() -- as the only changes -- and
>> no error messages?
>> > Yes.
>>
>> The code after being changed:
>> #include
>> #include
>>
>> void main()
>> {
>> int j, a = 0;
>> clock_t start, finish;
>> double duration;
>> start = 1;//clock();
>> for (j = 0; j < 3; j++) {
>> a += 1;
>> }
>> finish = 8;//clock();
>> duration = (double)(finish -start) / CLOCKS_PER_SEC;
>> // printf("%f\n", duration);
>> }
>>
>> In this case you keep clock() and printf(), and add while (1) as last
>> line of code inside main(), and again, no errors?
>> >yes.
>>
>> The code after being changed:
>> #include
>> #include
>>
>> void main()
>> {
>> int j, a = 0;
>> clock_t start, finish;
>> double duration;
>> start = clock();
>> for (j = 0; j < 3; j++) {
>> a += 1;
>> }
>> finish = clock();
>> duration = (double)(finish -start) / CLOCKS_PER_SEC;
>> printf("%f\n", duration);
>> while(1);
>> }
>>
>> ________________________________
>> From: Jeff Brower
>> To: c...
>> Cc: Yi Guo
>> Sent: Fri, February 18, 2011 8:30:05 AM
>> Subject: Re: [c6x] problem with using clock() and printf()
>>
>> Yi Guo-
>>
>> > Thenks. See the Q&As bellow.
>> >
>> > 1) This may have been asked already... did you try without clock() and
>> > printf()? With those lines commented, do you
>> > still get breakpoint-related error messages?
>> >>no, i don't.
>>
>> Ok, so you removed clock() and printf() -- as the only changes -- and
>> no error messages?
>>
>> > 2) If you add:
>> >
>> > while (1);
>> >
>> > as the last line, can the program run without errors?
>> >> yes, it runs well.
>>
>> In this case you keep clock() and printf(), and add while (1) as last
>> line of code inside main(), and again, no errors?
>>
>> -Jeff
>>
>> > ________________________________
>> > From: Jeff Brower
>> > To: c...
>> > Cc: Yi Guo
>> > Sent: Thu, February 17, 2011 12:44:43 PM
>> > Subject: Re: [c6x] problem with using clock() and printf()
>> >
>> > Yi Guo-
>> >
>> >> void main()
>> >> {
>> >> int j, a = 0;
>> >> clock_t start, finish;
>> >> double duration;
>> >> start = clock();
>> >> for (j = 0; j < 3; j++) {
>> >> a += 1;
>> >> }
>> >> finish = clock();
>> >> duration = (double)(finish -start) / CLOCKS_PER_SEC;
>> >> printf("%f\n", duration);
>> >> }
>> >
>> > 1) This may have been asked already... did you try without clock() and
>> > printf()? With those lines commented, do you
>> > still get breakpoint-related error messages?
>> >
>> > 2) If you add:
>> >
>> > while (1);
>> >
>> > as the last line, can the program run without errors?
>> >
>> > -Jeff
>> >
>> >
>> >> Mikedunn,
>> >>
>> >> Thank you for help.
>> >> I didn't find any optimization options were selected:
>> >> Build option-->compiler-->opt level-->noneBuild option-->compiler-->program
>> >> level opt-->none
>> >>
>> >> I followed the steps you provided to do some test for some times, I
>> >> always received an error message from CCS:
>> >> Error: Error 0x0000000C/-2044 Error during: Register, Break Point, No
>> >> breakpoint at 0x00007360
>> >>
>> >> Then here are Q&As.
>> >> Q1. If 0-4 is successful, repeat 1-4 a few times to make sure that results
>> are
>> >> consistent. results??
>> >> See the error message above.
>> >>
>> >> Q2. What are the contents of your GEL file?? paste in your next post.
>> >> /*--------------------------*/
>> >> /* EVMDM642.gel */
>> >> /* Version 1.70 */
>> >> /*--------------------------*/
>> >> /* The StartUp() function is called each time CCS is started. */
>> >> /* Customize this function to perform desired initialization. */
>> >> /*--------------------------*/
>> >> StartUp()
>> >> {
>> >> setup_memory_map();
>> >> GEL_Reset();
>> >> init_emif();
>> >> }
>> >> /*--------------------------*/
>> >> /* Setup memory map for DM642 EVM. */
>> >> /* */
>> >> /*--------------------------*/
>> >> setup_memory_map()
>> >> {
>> >> GEL_MapOn();
>> >> GEL_MapReset();
>> >> /* On-chip memory map */
>> >> GEL_MapAdd(0x00000000, 0, 0x00040000, 1, 1); /* Internal Memory */
>> >> GEL_MapAdd(0x01800000, 0, 0x00000058, 1, 1); /* EMIFA CTL REGS */
>> >> GEL_MapAdd(0x01840000, 0, 0x000082FC, 1, 1); /* INT MEM CTL REGS */
>> >> GEL_MapAdd(0x018C0000, 0, 0x0000003C, 1, 1); /* MCBSP0 CTL REGS */
>> >> GEL_MapAdd(0x01900000, 0, 0x0000003C, 1, 1); /* MCBSP1 CTL REGS */
>> >> GEL_MapAdd(0x01940000, 0, 0x00000008, 1, 1); /* TIMER0 CTL REGS */
>> >> GEL_MapAdd(0x01980000, 0, 0x00000008, 1, 1); /* TIMER1 CTL REGS */
>> >> GEL_MapAdd(0x019C0000, 0, 0x00000008, 1, 1); /* INT CTL REGS */
>> >> GEL_MapAdd(0x01A00000, 0, 0x0000FFFC, 1, 1); /* EDMA REGS AND PARAM */
>> >> GEL_MapAdd(0x01A40000, 0, 0x0000003C, 1, 1); /* MCBSP2 CTL REGS */
>> >> GEL_MapAdd(0x01A80000, 0, 0x00000054, 1, 1); /* EMIFB CTL REGS */
>> >> GEL_MapAdd(0x01AC0000, 0, 0x00000008, 1, 1); /* TIMER2 CTL REGS */
>> >> GEL_MapAdd(0x01B00000, 0, 0x00000024, 1, 1); /* GPIO REGS */
>> >> GEL_MapAdd(0x01B3F000, 0, 0x00000020, 1, 1); /* Device Configuration */
>> >> GEL_MapAdd(0x01B40000, 0, 0x0000003C, 1, 1); /* I2C CTL REGS */
>> >> GEL_MapAdd(0x01B4C000, 0, 0x000002A0, 1, 1); /* McASP0 CTL REGS */
>> >> GEL_MapAdd(0x01C00000, 0, 0x00000028, 1, 1); /* PCI CTL REGS */
>> >> GEL_MapAdd(0x01C20000, 0, 0x0000000C, 1, 1); /* PCI EEPROM REGS */
>> >> GEL_MapAdd(0x01C40000, 0, 0x00000270, 1, 1); /* VP0 Control */
>> >> GEL_MapAdd(0x01C44000, 0, 0x00000270, 1, 1); /* VP1 Control */
>> >> GEL_MapAdd(0x01C48000, 0, 0x00000270, 1, 1); /* VP2 Control */
>> >> GEL_MapAdd(0x01C80000, 0, 0x00000680, 1, 1); /* EMAC CTL REGS */
>> >> GEL_MapAdd(0x01C81000, 0, 0x00002000, 1, 1); /* EMAC Wrapper */
>> >> GEL_MapAdd(0x01C83000, 0, 0x0000000C, 1, 1); /* EWRAP REGS */
>> >> GEL_MapAdd(0x01C83800, 0, 0x00000090, 1, 1); /* MDIO CTL REGS */
>> >> GEL_MapAdd(0x02000000, 0, 0x00000030, 1, 1); /* QDMA REGS */
>> >> GEL_MapAdd(0x30000000, 0, 0x04000000, 1, 1); /* MCBSP0 Data, EDMA map */
>> >> GEL_MapAdd(0x34000000, 0, 0x04000000, 1, 1); /* MCBSP1 Data, EDMA map */
>> >> GEL_MapAdd(0x74000000, 0, 0x02000000, 1, 1); /* VP0 Channel A Data */
>> >> GEL_MapAdd(0x76000000, 0, 0x02000000, 1, 1); /* VP0 Channel B Data */
>> >> GEL_MapAdd(0x78000000, 0, 0x02000000, 1, 1); /* VP1 Channel A Data */
>> >> GEL_MapAdd(0x7A000000, 0, 0x02000000, 1, 1); /* VP1 Channel B Data */
>> >> GEL_MapAdd(0x7C000000, 0, 0x02000000, 1, 1); /* VP2 Channel A Data */
>> >> GEL_MapAdd(0x7E000000, 0, 0x02000000, 1, 1); /* VP2 Channel B Data */
>> >> /* Off-chip memory map */
>> >> GEL_MapAdd(0x80000000, 0, 0x02000000, 1, 1); /* 32MB SDRAM EMIF-A, CE0*/
>> >> GEL_MapAdd(0x90000000, 0, 0x00080000, 1, 1); /* 4MB Flash EMIF-A, CE1 */
>> >> GEL_MapAdd(0x90080000, 0, 0x00080000, 1, 1); /* 4MB FPGA EMIF-A, CE1 */
>> >> GEL_MapAdd(0xA0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE2 EXPANSION */
>> >> GEL_MapAdd(0xB0000000, 0, 0x10000000, 1, 1); /* EMIF-A, CE3 EXPANSION */
>> >> }
>> >> /*--------------------------*/
>> >> /* init_emif() */
>> >> /*--------------------------*/
>> >> init_emif()
>> >> {
>> >> #define EMIFA_GCTL 0x01800000
>> >> #define EMIFA_CE1 0x01800004
>> >> #define EMIFA_CE0 0x01800008
>> >> #define EMIFA_CE2 0x01800010
>> >> #define EMIFA_CE3 0x01800014
>> >> #define EMIFA_SDRAMCTL 0x01800018
>> >> #define EMIFA_SDRAMTIM 0x0180001c
>> >> #define EMIFA_SDRAMEXT 0x01800020
>> >> #define EMIFA_CE1SECCTL 0x01800044
>> >> #define EMIFA_CE0SECCTL 0x01800048
>> >> #define EMIFA_CE2SECCTL 0x01800050
>> >> #define EMIFA_CE3SECCTL 0x01800054
>> >>
>> >> /* EMIFA */
>> >> *(int *)EMIFA_GCTL = 0x00052078;
>> >> *(int *)EMIFA_CE0 = 0xffffffd3; /* CE0 SDRAM */
>> >> *(int *)EMIFA_CE1 = 0x73a28e01; /* CE1 Flash + CPLD */
>> >> *(int *)EMIFA_CE2 = 0x22a28a22; /* CE2 Daughtercard 32-bit async */
>> >> *(int *)EMIFA_CE3 = 0x22a28a42; /* CE3 Daughtercard 32-bit sync */
>> >> *(int *)EMIFA_SDRAMCTL = 0x57115000; /* SDRAM control */
>> >> *(int *)EMIFA_SDRAMTIM = 0x0000081b; /* SDRAM timing (refresh) */
>> >> *(int *)EMIFA_SDRAMEXT = 0x001faf4d; /* SDRAM extended control */
>> >> *(int *)EMIFA_CE0SECCTL= 0x00000002; /* CE0 Secondary Control Reg. */
>> >> *(int *)EMIFA_CE1SECCTL= 0x00000002; /* CE1 Secondary Control Reg. */
>> >> *(int *)EMIFA_CE2SECCTL= 0x00000002; /* CE2 Secondary Control Reg. */
>> >> *(int *)EMIFA_CE3SECCTL= 0x00000073; /* CE3 Secondary Control Reg. */
>> >> }
>> >> /*--------------------------*/
>> >> /* clear_memory_map() */
>> >> /*--------------------------*/
>> >> clear_memory_map()
>> >> {
>> >> GEL_MapOff();
>> >> }
>> >> /*--------------------------*/
>> >> /* FlushCache() */
>> >> /*--------------------------*/
>> >> FlushCache()
>> >> {
>> >> /* Invalidate L1I and L1D */
>> >> *(int *)0x01840000 = (*(int *)0x01840000 | 0x00000300);
>> >>
>> >> /* Clean L2 */
>> >> *(int *)0x01845004 = 0x1;
>> >> }
>> >>
>> >> /*--------------------------*/
>> >> /* OnReset() */
>> >> /*--------------------------*/
>> >> OnReset(int nErrorCode)
>> >> {
>> >> init_emif();
>> >> }
>> >>
>> >> /*--------------------------*/
>> >> /* OnPreFileLoaded() */
>> >> /* This function is called automatically when the 'Load Program'*/
>> >> /* Menu item is selected. */
>> >> /*--------------------------*/
>> >> OnPreFileLoaded()
>> >> {
>> >> /* GEL_Reset(); -- Commented out for CCS 2.20 */
>> >> FlushCache();
>> >> IER = 0;
>> >> IFR = 0;
>> >> init_emif();
>> >> }
>> >> /*--------------------------*/
>> >> /* OnRestart() */
>> >> /* This function is called by CCS when you do Debug->Restart. */
>> >> /* The goal is to put the C6x into a known good state with */
>> >> /* respect to cache, edma and interrupts. */
>> >> /* Failure to do this can cause problems when you restart and */
>> >> /* run your application code multiple times. This is different */
>> >> /* then OnPreFileLoaded() which will do a GEL_Reset() to get the*/
>> >> /* C6x into a known good state. */
>> >> /*--------------------------*/
>> >> OnRestart(int nErrorCode )
>> >> {
>> >> /* Turn off L2 for all EMIFA CE spaces. App should
>> >> * manage these for coherancy in the application.
>> >> * GEL_TextOut("Turn off cache segment\n");
>> >> */
>> >> *(int *)0x1848200 = 0; /* MAR0 */
>> >> *(int *)0x1848204 = 0; /* MAR1 */
>> >> *(int *)0x1848208 = 0; /* MAR2 */
>> >> *(int *)0x184820c = 0; /* MAR3 */
>> >>
>> >> /* Disable EDMA events and interrupts and clear any
>> >> * pending events.
>> >> * GEL_TextOut("Disable EDMA event\n");
>> >> */
>> >> *(int *)0x01A0FFA8 = 0; /* CIERH */
>> >> *(int *)0x01A0FFB4 = 0; /* EERH */
>> >> *(int *)0x01A0FFB8 = 0XFFFFFFFF; /* ECRH */
>> >>
>> >> *(int *)0x01A0FFE8 = 0; /* CIERL */
>> >> *(int *)0x01A0FFF4 = 0; /* EERL */
>> >> *(int *)0x01A0FFF8 = 0xFFFFFFFF; /* ECRL */
>> >>
>> >> /* Disable other interrupts */
>> >> IER = 0;
>> >> IFR = 0;
>> >> }
>> >> /*--------------------------*/
>> >> /* RESET MENU */
>> >> /*--------------------------*/
>> >> menuitem "Resets";
>> >> hotmenu Reset_BreakPts_and_EMIF()
>> >> {
>> >> GEL_BreakPtReset();
>> >> GEL_Reset();
>> >> init_emif();
>> >> }
>> >> hotmenu Flush_Cache()
>> >> {
>> >> FlushCache();
>> >> }
>> >> /*--------------------------*/
>> >> /* MEMORY MAP MENU */
>> >> /*--------------------------*/
>> >> menuitem "Memory Map";
>> >> hotmenu SetMemoryMap()
>> >> {
>> >> setup_memory_map();
>> >> }
>> >> hotmenu ClearMemoryMap()
>> >> {
>> >> clear_memory_map();
>> >> }
>> >> /*--------------------------*/
>> >> /* BOARD OPTIONS MENU */
>> >> /*--------------------------*/
>> >> menuitem "Board Options";
>> >> #define CPLD_REVISION 0x9008001F
>> >> hotmenu CheckFPGARevision()
>> >> {
>> >> GEL_TextOut(" FPGA Revision %d\n","Output",1,1,1, *(char *)CPLD_REVISION);
>> >> GEL_TextOut(" Note: Revision only valid if FGPA DONE LED is on
>> >> (DS9)\n","Output",1,1,1);
>> >> }
>> >>
>> >> Q3. What is your target board??
>> >> EVMDM642
>> >> 720MHz
>> >>
>> >> ________________________________
>> >> From: mikedunn
>> >> To: Yi Guo
>> >> Cc: c...
>> >> Sent: Thu, February 17, 2011 3:21:51 AM
>> >> Subject: Re: [c6x] problem with using clock() and printf()
>> >>
>> >>
>> >> Yi Guo,
>> >>
>> >> OK, lets see if we can get a set of consistent symptoms.
>> >> Note that the steps below apply to first and second generation C6000 devices
>> >> [like 6201, 6713, 6416] in addition to the DM642. Do not use with C64+
>> > devices.
>> >> The following steps will are not likely to resolve your problem, but they
>> will
>> >> eliminate any doubts WRT extraneous interrupts and possible erratic reset
>> >> behavior. IMO it is always good practice to initialize the interrupt vectors
>> >> when troubleshooting [I plug them with breakpoints - if you get an unexpected
>> >> interrupt, you know it right away].
>> >> STEP 1:
>> >> First a minor change to the .cmd file. add the 'VECS' and '.vectors' lines as
>> >> shown below:
>> >> --begin--
>> >> MEMORY
>> >> {
>> >> VECS: org = 000h, len = 400h
>> >> IRAM: org = 400h, len = 0FC00h
>> >> }
>> >> SECTIONS
>> >> {
>> >> .vectors :> VECS
>> >> ------end of changes---
>> >> STEP 2:
>> >> Then add the code below to a file called 'vectors.asm'.
>> >> Begin 'vectors.asm'---------
>> >> ;
>> >> ; Copyright 2003 by Texas Instruments Incorporated.
>> >> ; All rights reserved. Property of Texas Instruments Incorporated.
>> >> ; Restricted rights to use, duplicate or disclose this code are
>> >> ; granted through contract.
>> >> ;
>> >> ;
>> >> ; "@(#) DSP/BIOS 4.90.270 01-13-05 (barracuda-o07)"
>> >> ; hacked by mikedunn
>> >> ;
>> >
>> >
>> >
> ------- End of Original Message -------
_____________________________________
