|
Hi Albert, the bits SRRFH, SRRFL, SRD1H, SRD1L, SRD2H and SRD2L in the MODE1 register control alternate register select. Please note that the super-fast interrupt dispatcher (if you are using C) uses this feature too. As with any SHARC issue, read the manual... http://www.analog.com/library/dspManuals/32BitIndex.html On another issue, has anyone found the following anomaly? Problem description (ADSP-21161): When 1. SPORT DMA is enabled (with chaining), 2. EP DMA is enabled and 3. Reading of DMASTAT during EP DMA transfer Result: Data corruption occurs in the EP DMA channel due to the reading of DMASTAT. Conclusion: There is very strong evidence of a new anomaly associated with the reading of the DMASTAT IOP register during multiple DMA transfer operations. Regards, Alex Young DSP software Engineer Consultant for Philips Digital Systems Laboratories Philips Technology Campus Leuven Interleuvenlaan 74-82 B-3001 LEUVEN, BELGIUM e-mail: Albert Cesari < To: > cc: (bcc: Alex Young/LEU/PDSL/PHILIPS) Subject: [adsp] switch between register sets 03/09/02 17:04 Please respond Classification: to acesari hi group, Can anyone tell me how to switch between the 2 register sets in assembly, for the 21065L?? or related doc, or examples...??? any tip would be useful! thanxs! albert _____________________________________ Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. _____________________________________ About this discussion group: To Join: Send an email to To Post: Send an email to To Leave: Send an email to Archives: http://groups.yahoo.com/group/adsp Other Groups: http://www.dsprelated.com/groups.php3 ">http://docs.yahoo.com/info/terms/ |
alternate reg. switch / anomaly
Started by ●September 4, 2002
