|
Hi! I implemented an "interprocessor communication" between several ADSP21065L with a SPORT in multichannel mode, that fails hazardous. There are 7 timeslots containing 14bits. One is the master (lets call him DSP1) and the other are slaves. In my testcase I elaborated only communication between DSP1 and DSP2. DSP1 is transmitting on the first timeslot and DSP2 is transmitting on the 2nd slot (this configuration is fixed for the testcase, there is no reconfiguration of the MTCS1 registers.) Thus the SPORTS are initialized as follows: DSP1: r0=0x1; dm(MTCS1)=r0; r0=0x2; dm(MRCS1)=r0; DSP2: r0=0x2; dm(MTCS1)=r0; r0=0x1; dm(MRCS1)=r0; If DSP1 has to communicate with DSP2, I simply enable the SPT1I irq: DSP1: bit set imask SPT1I. And within the interrupt service I fetch the value to transmit from a buffer and write it to the SPORT: DSP1: r0=dm(....); dm(TX1_A)=r0; Thus the value is transmitted next time when timeslot 1 is active. If the buffer to transmit is empty, the interrupt service writes -1 to TX_1A. That sets all 14bits to ones, that is defined as IDLE state on the TDM TX line and DSP2 does not start its SPR1I service, because the KEYWD register is accordingly configured. Finally the SPT1I service in DSP1 disables itself with: bit clr imask SPT1I; And from now every timeslot1 transmits the last value written. That is all 14bits one. When there are further values to transmit, i simply reenable SPT1I. Now the Problem: When I start a new transmission with reenabling SPT1I, sometimes the upper bits of the timeslot1 still have the wrong value 1. It seems like at the beginning of the timeslot, there is transmitted the last value written to TX_1A and at the end there are transmitted the lower bits of the new value (MSB first order transmitting). But the lower bits (sometimes 13, sometimes only 6 or less) are always from the new value and therefore correct. Are there any restrictions when to write to the TX1_A register like in EE-74 Note "when to write to the MTCSx registers". I expected, that an application can write fully asynchronous to the SPORT. A hint for your solutions: This problem has nothing in common with hardware reflexions on board traces, because all the timing for the SPORT in DSP1 is generated internally. TIA Hans-Joerg ......................... processing your money Wagner Hans-Joerg organization: BEB Industrie-Elektronik AG address: Progressastrasse 31 location: CH-3414 Oberburg Switzerland phone: +41 34 420 88 33 fax: +41 34 420 88 39 www.beb.ch ............................................... |
ADSP21065L SPORT in multichannel mode
Started by ●July 20, 2000
