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I'm interfacing a cluster of ADSP-21065s 32-bit host port interfaces to
a member of the Mot Coldfire and have been around and around about how to connect the address lines of the Coldfire to the address bus of the 20165L. I think we should start the address bus connection from A2 on the mot side connected to A0 on the 21065 side. Coldfire ADSP-21065L A2 A0 . . . . . . A18 A16 A17---| . | . |--- Connected to ground through buffers controlled by HBG . | A23---| How wrong am I? |
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ADSP-21065L to Coldfire
Started by ●September 2, 2003
Reply by ●September 3, 20032003-09-03
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On Tue, 2 Sep 2003, Steve Holle wrote: > I'm interfacing a cluster of ADSP-21065s 32-bit host port interfaces to a > member of the Mot Coldfire and have been around and around about how to > connect the address lines of the Coldfire to the address bus of the 20165L. > > I think we should start the address bus connection from A2 on the mot side > connected to A0 on the 21065 side. > > Coldfire ADSP-21065L > A2 A0 > . . > . . > . . > A18 A16 > A17---| > . | > . |--- Connected to ground through buffers controlled by HBG > . | > A23---| > > How wrong am I? Coldfire is byte addressable isn't it? Since the 21065 is only word (or longword in coldfire's lexicon) addressable, that looks good to me. I'd use the upper lines for bank selects if you have multiple 21065's. What kind of interconnect will you have? Dual port ram would be nice (but expensive :-) Patience, persistence, truth, Dr. mike |
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Reply by ●September 3, 20032003-09-03
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At 07:24 PM 9/2/2003 -0700, Mike Rosing wrote: >On Tue, 2 Sep 2003, Steve Holle wrote: > > > I'm interfacing a cluster of ADSP-21065s 32-bit host port interfaces to a > > member of the Mot Coldfire and have been around and around about how to > > connect the address lines of the Coldfire to the address bus of the 20165L. > > > > I think we should start the address bus connection from A2 on the mot side > > connected to A0 on the 21065 side. > > > > Coldfire ADSP-21065L > > A2 A0 > > . . > > . . > > . . > > A18 A16 > > A17---| > > . | > > . |--- Connected to ground through buffers > controlled by HBG > > . | > > A23---| > > > > How wrong am I? > >Coldfire is byte addressable isn't it? Since the 21065 is only word (or >longword in coldfire's lexicon) addressable, that looks good to me. I'd >use the upper lines for bank selects if you have multiple 21065's. What >kind of interconnect will you have? Dual port ram would be nice (but >expensive :-) > >Patience, persistence, truth, >Dr. mike We were hoping to use DMA to transfer from SRAM to the host port. Is this workable? Thanks for your help by the way. |
Reply by ●September 3, 20032003-09-03
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On Wed, 3 Sep 2003, Steve Holle wrote: > We were hoping to use DMA to transfer from SRAM to the host port. Is this > workable? Yes. I'm not sure about bus contention, so make sure only one 21065 has access to the SRAM at a time. Other than that, should work fine! Patience, persistence, truth, Dr. mike |
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Reply by ●September 3, 20032003-09-03
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At 08:32 AM 9/3/2003 -0700, Mike Rosing wrote: >On Wed, 3 Sep 2003, Steve Holle wrote: > > > We were hoping to use DMA to transfer from SRAM to the host port. Is this > > workable? > >Yes. I'm not sure about bus contention, so make sure only one 21065 >has access to the SRAM at a time. Other than that, should work fine! > >Patience, persistence, truth, >Dr. mike Each 21065L will have it's own SRAM and each host port will be mapped into a separate memory mapped area in the Coldfire. >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author >of this message will receive your answer. You need to do a "reply all" if >you want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://groups.yahoo.com/group/adsp > >Other Groups: http://www.dsprelated.com/groups.php3 >">http://docs.yahoo.com/info/terms/ |
Reply by ●September 3, 20032003-09-03
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On Wed, 3 Sep 2003, Steve Holle wrote: > Each 21065L will have it's own SRAM and each host port will be mapped into > a separate memory mapped area in the Coldfire. But data bus is common (or how else does Coldfire talk to each 21065?). If every dsp has it's own address and data bus, and you use a tristate switch to connect the Coldfire to one dsp at a time, you'd have a very fast system since each dsp would only have to relinquish its bus when the Coldfire needs to get in. A very nice toy :-) Have fun with it! Patience, persistence, truth, Dr. mike |
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Reply by ●September 3, 20032003-09-03
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I had a whole lot of SPI fun on the 21161N with the 21161N configured as a slave. I was told by an AD field support engineer that there were some problems with their dsp revision 1.0(or 1.1?). The newer revision 1.2 and above is supposed to solve those issues. So if you are having problems with 21161 SPI, check the hardware revision. __________________________________ |
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Reply by ●September 3, 20032003-09-03
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At 11:03 AM 9/3/2003 -0700, Mike Rosing wrote: >On Wed, 3 Sep 2003, Steve Holle wrote: > > > Each 21065L will have it's own SRAM and each host port will be mapped into > > a separate memory mapped area in the Coldfire. > >But data bus is common (or how else does Coldfire talk to each 21065?). >If every dsp has it's own address and data bus, and you use a tristate >switch to connect the Coldfire to one dsp at a time, you'd have a very >fast system since each dsp would only have to relinquish its bus when >the Coldfire needs to get in. > >A very nice toy :-) Have fun with it! > >Patience, persistence, truth, >Dr. mike That's exactly what we are doing, with tristate buffers controlled by each DSPs bus grant signals. >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author >of this message will receive your answer. You need to do a "reply all" if >you want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://groups.yahoo.com/group/adsp > >Other Groups: http://www.dsprelated.com/groups.php3 >">http://docs.yahoo.com/info/terms/ |
Reply by ●September 3, 20032003-09-03
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I have one of the 21161N EZ-KITs, and it has rev 1.2 chip on it, and it was still acting up. Al Clark steered me to the documentation errata, that states both SPRINT and SPTINT bits need to be set for correct operation of the SPI hardware. After I enable the interrupts, things worked fine. Thanks for the input. Robert Allen Senior Software Engineer Goodrich Sensor Systems --- In , h h <hh_ca@y...> wrote: > I had a whole lot of SPI fun on the 21161N with the > 21161N configured as a slave. I was told by an AD > field support engineer that there were some problems > with their dsp revision 1.0(or 1.1?). The newer > revision 1.2 and above is supposed to solve those > issues. So if you are having problems with 21161 SPI, > check the hardware revision. > > __________________________________ > |
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Reply by ●September 3, 20032003-09-03
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There are issues with the earlier silicon. The biggest issue was with the PLL. All of our boards use Rev 1.2 Silicon. Here is the answer to the SPI problem You *HAVE* to set both interrupt enables (SPRINT, SPTINT) in the SPICTL register. This isn't listed in the Chip's errata. It is buried in the "documentation errata" but is not easy to find. Also, there's some garbage in the 21161 manual's example SPI code about writing two values to the SPI transmit register before you enable it. If you try that, it causes more problems that it solves. I think they wrote that sample code with an earlier version of the silicon. Enable those two bits, and write SPI code like you normally would, and you should be OK. Question: >I am just starting trying to use it, and I have found some curious >behavior. No matter what configuration I put ni SPICTL, when I write >to SPITX, I get three words transmitted out. The first word is the >correct length and data. The next two words have 0's for the data, >but the right word length. I don't want these two extra words to >come out. I am not hooked to any other devices (that I know). I am >using the ADI development kit, so I know what the schematic tells >me. I think that I have the relevant devices disconnected from the >SPI bus. >__________________________________ >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author >of this message will receive your answer. You need to do a "reply all" if >you want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://groups.yahoo.com/group/adsp > >Other Groups: http://www.dsprelated.com/groups.php3 >">http://docs.yahoo.com/info/terms/ Al Clark Danville Signal Processing, Inc. -------------------------------- Purveyors of Fine DSP Hardware and other Cool Stuff Available at http://www.danvillesignal.com |
