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Hi All, In the talk though program given below for ADSP 2181 EZ-KIT Lite, I want to use the auto buffering feature of ADSP2181 to take a block of 256 samples to calculate the FFT. (In my application one sample period, 1/8000 sec (at 8 KHz sampling frequency), is not sufficient to process 256 samples.). But when tested using talkthru program shown below it is found that if the rx_buf and tx_buf length exceeds 30 , I am getting only left channel out put. If the buffer length is less than 33 (corresponding to 33/3 samples per channel) in both channel I am getting the output (2nd and 3rd line in the program). This I tested for both 8KHz and for 44.1KHz. In both cases this problem is there. What is the reason for this? Or any other method to buffer the data. My application is speech noise reduction for which I have to calculate the fft. Thanks Reju Talkthru program .module/RAM/ABS=0 talkthru; .var/dm/ram/circ rx_buf[33]; {Status + L data + R data}{###rx_buf[33] will give only left channel but rx_buf[30] will give both channels ############} .var/dm/ram/circ tx_buf[33]; {Control + L data + R data}{### tx_buf [33] will give only left channel but tx_buf[30] will give both channels ############} .var/dm/ram/circ init_cmds[13]; {AD1847 initialization values} .var/dm/ram stat_flag; {AD1847 status flag} .init tx_buf: 0xc000, 0x0000, 0x0000; {Initially set MCE of AD1847} .init init_cmds: 0xc002, {Left input control reg} 0xc102, {Right input control reg} 0xc288, {left aux 1 control reg} 0xc388, {right aux 1 control reg} 0xc488, {left aux 2 control reg} 0xc588, {right aux 2 control reg} 0xc680, {left DAC control reg} 0xc780, {right DAC control reg} 0xc850, {data format reg: Fs = 8 KHz} 0xc909, {interface configuration reg} 0xca00, {pin control reg} 0xcc40, {miscellaneous information reg} 0xcd00; {digital mix control reg} {----- Interrupt vector table -------------------} jump start; rti; rti; rti; {00: reset} rti; rti; rti; rti; {04: IRQ2} rti; rti; rti; rti; {08: IRQL1} rti; rti; rti; rti; {0c: IRQL0} ar = dm(stat_flag); {10: SPORT0 tx} ar = pass ar; if eq rti; jump next_cmd; jump input_samples; {14: SPORT0 rx} rti; rti; rti; rti; rti; rti; rti; {18: IRQE} rti; rti; rti; rti; {1c: BDMA} rti; rti; rti; rti; {20: SPORT1 tx or IRQ} rti; rti; rti; rti; {24: SPORT1 rx or IRQ0} rti; rti; rti; rti; {28: timer} rti; rti; rti; rti; {2c: power down} {---- ADSP 2181 intialization ------------------} start: i0 = ^rx_buf; {Index to top of circular buffer} l0 = %rx_buf; {Enable circular buffer} i1 = ^tx_buf; l1 = %tx_buf; i3 = ^init_cmds; l3 = %init_cmds; m1 = 1; {Set Post-Increment to 1} {---Data Memory Mapped Control Register Setup----} ax0 = 0x1000; dm (0x3fff) = ax0; {Sys Con Reg: Enable SPORT0} ax0 = 0x0000; dm (0x3ffe) = ax0; {Wait States Con Reg: DM WS 0} ax0 = 0x0287; dm (0x3ff3) = ax0; {AB ena, TX: I1,M1; RX: I0,M1} ax0 = 0x0000; dm (0x3ff4) = ax0; {RFSDIV not used} dm (0x3ff5) = ax0; {SCLK not used} ax0 = 0x860F; dm (0x3ff6) = ax0; {Multichannel Enable} ax0 = 0x0007; dm (0x3ff7) = ax0; {transmit word enables (LO) } dm (0x3ff8) = ax0; {transmit word enables (HI) } dm (0x3ff9) = ax0; {receive word enables (LO) } dm (0x3ffa) = ax0; {receive word enables (HI) } ifc = 0x00FF; {clear pending interrupt} nop; icntl = 0x00; {enable level sensitive interrupt} mstat = 0x40; {Go Mode enable} {---- ADSP 1847 Codec intialization-------------} ax0 = 1; dm(stat_flag) = ax0; {clear flag} imask = 0x040; {enable transmit interrupt} ax0 = dm (i1, m1); {start interrupt} tx0 = ax0; check_init: ax0 = dm (stat_flag); {wait for entire init} af = pass ax0; {buffer to be sent to} if ne jump check_init; {the codec} ay0 = 2; check_aci1: ax0 = dm (rx_buf); {once initialized, wait for codec} ar = ax0 and ay0; {to come out of autocalibration} if eq jump check_aci1; {wait for bit set} check_aci2: ax0 = dm (rx_buf); {wait for bit clear} ar = ax0 and ay0; if ne jump check_aci2; idle; ay0 = 0xbf3f; {unmute left DAC} ax0 = dm (init_cmds + 6); ar = ax0 AND ay0; dm (tx_buf) = ar; idle; ax0 = dm (init_cmds + 7); {unmute right DAC} ar = ax0 AND ay0; dm (tx_buf) = ar; idle; ifc = 0x00FF; {clear any pending interrupt} nop; imask = 0x020; {Enable receive interrupt} {---- wait for interrupt and loop forever ------} samples: idle; jump samples; {---- Interrupt service routines ---------------} {---- receive interrupt used for loopback ------} input_samples: ena sec_reg; {use shadow register bank} mr0 = dm (rx_buf + 1); {1st sample} mr1 = dm (rx_buf + 2); dm (tx_buf + 1) = mr0; dm (tx_buf + 2) = mr1; mr0 = dm (rx_buf + 4); {2nd sample} mr1 = dm (rx_buf + 5); dm (tx_buf + 4) = mr0; dm (tx_buf + 5) = mr1; mr0 = dm (rx_buf + 7); {3rd sample} mr1 = dm (rx_buf + 8); dm (tx_buf + 7) = mr0; dm (tx_buf + 8) = mr1; mr0 = dm (rx_buf + 10); {4th sample} mr1 = dm (rx_buf + 11); dm (tx_buf + 10) = mr0; dm (tx_buf + 11) = mr1; mr0 = dm (rx_buf + 13); {5th sample} mr1 = dm (rx_buf + 14); dm (tx_buf + 13) = mr0; dm (tx_buf + 14) = mr1; mr0 = dm (rx_buf + 16); {6th sample} mr1 = dm (rx_buf + 17); dm (tx_buf + 16) = mr0; dm (tx_buf + 17) = mr1; mr0 = dm (rx_buf + 19); {7th sample} mr1 = dm (rx_buf + 20); dm (tx_buf + 19) = mr0; dm (tx_buf + 20) = mr1; mr0 = dm (rx_buf + 22); {8th sample} mr1 = dm (rx_buf + 23); dm (tx_buf + 22) = mr0; dm (tx_buf + 23) = mr1; mr0 = dm (rx_buf + 25); {9th sample} mr1 = dm (rx_buf + 26); dm (tx_buf + 25) = mr0; dm (tx_buf + 26) = mr1; mr0 = dm (rx_buf + 28); {10th sample} mr1 = dm (rx_buf + 29); dm (tx_buf + 28) = mr0; dm (tx_buf + 29) = mr1; mr0 = dm (rx_buf + 31); {11th sample} mr1 = dm (rx_buf + 32); dm (tx_buf + 31) = mr0; dm (tx_buf + 32) = mr1; rti; {---- transmit interrupt used for Codec initialization --} next_cmd: ena sec_reg; ax0 = dm (i3, m1); {fetch next control word and } dm (tx_buf) = ax0; {place in transmit slot 0 } ax0 = i3; ay0 = ^init_cmds; ar = ax0 - ay0; if gt rti; {rti if more control words still waiting } ax0 = 0xAF00; {else set done flag and } dm (tx_buf) = ax0; {remove MCE if done initialization } ax0 = 0; dm (stat_flag) = ax0; {reset status flag } rti; .endmod; |
ADSP 2181 autobuffering problem in talkthru program
Started by ●January 17, 2004
