|
Hello, I am working with the BF533 ADSP (EZ_KIT). I am trying to connect it up to a digital image sesnor through the PPI port. I have no problem in writing to the PPI_CONTROL register however it does not appear to be operating like it should. The problem occurs when trying to configure it to work with two or three external frame syncs. With PORT_CFG, one frame sync it works fine with the correct data being received in through the PPI. However with PORT_CFG or 10, two or three external frame syncs, there is nothing being recieved in through the PPI port. The exact value written to PPI_CONTROL is as follows: PORT_CFG = 0x001D(2 syncs) or 0x002D(3 syncs). Is there some anomaly with the PPI_CONTROL registers that hasnt been noted by ADI, or must the actuall signals being received at the PFS1 and PFS2 pins be of a certain format, i.e High-to-Low, Low-to-High, or have some special timing charcateristic. I would appreciated anyones help with this matter, regards, stephen _______________________________ |
BF533, PPI_CONTROL anomaly??????
Started by ●September 1, 2004
