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Hi everybody , i'm involved in a project which has two Black Fin processors(ADSP-BF533,Silicon version 0.2,operating at 500Mhz)and two ADSP-2191 processors(Slave).i have booted 2191 processors from Blackfin using SPI boot mode and the booting proces is consistant and have checked by executing a Led Toggling code in 2191 processors. I have written the code in C and used VDSP++ 3.5 version. Now i am trying to boot Blackfin processor from another Blackfin processor in SPi Master Mode boot.i have generated the SPI loader (8 BIT ,ASCII)in VDSP++3.5 .i followed the same procedure(as i followed for booting ADSP-2191) to pump the loader file in to the Blackfin processor . my problem is 1. I get receive ISR count which is much more that of the loader file size and the processor is not getting booted.i didnt get this problem when i boot 2191 processor using Black fin. i would like to know if the loader file generated for silicon revision 0.2 is correct i have given pullup resistors for MOSI and MISO ,and SCLK pins. is there any one who has faced such problems in booting.plz guide me to fix the problem. thanks in advance.. with rgds satish kumar |
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PROBLEM IS BLACKFIN-533 SPI BOOTING
Started by ●October 7, 2004
Reply by ●October 7, 20042004-10-07
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Hi Satish, I had a similar problem with latest version of VDSP 3.5 that generate wrong loader file for SPI. If I remember well problem is with flags on first block of data used for initialization (block that is supposed to be loaded directly and executed to setup peripherals) that is not tagged correctly. I think you should put pull-up resistor on SPI CS 2 also Regards > -----Original Message----- > From: [mailto:] > Sent: jeudi 7 octobre 2004 06:32 > To: > Cc: > Subject: [adsp] PROBLEM IS BLACKFIN-533 SPI BOOTING > > > Hi everybody , > i'm involved in a project which has two Black Fin > processors(ADSP-BF533,Silicon version 0.2,operating at 500Mhz)and two > ADSP-2191 processors(Slave).i have booted 2191 processors from Blackfin > using SPI boot mode and the booting proces is consistant and have checked > by executing a Led Toggling code in 2191 processors. > I have written the code in C and used VDSP++ 3.5 version. > > Now i am trying to boot Blackfin processor from another Blackfin processor > in SPi Master Mode boot.i have generated the SPI loader (8 BIT ,ASCII)in > VDSP++3.5 .i followed the same procedure(as i followed for booting > ADSP-2191) to pump the loader file in to the Blackfin processor . > my problem is > > 1. I get receive ISR count which is much more that of the loader file size > and the processor is not getting booted.i didnt get this problem when i > boot 2191 processor using Black fin. > > i would like to know if the loader file generated for silicon revision 0.2 > is correct > > i have given pullup resistors for MOSI and MISO ,and SCLK pins. > > is there any one who has faced such problems in booting.plz guide me to > fix the problem. > > thanks in advance.. > with rgds > satish kumar > > _____________________________________ > Note: If you do a simple "reply" with your email client, only the author > of this message will receive your answer. You need to do a "reply all" if > you want your answer to be distributed to the entire group. > > _____________________________________ > About this discussion group: > > To Join: Send an email to > > To Post: Send an email to > > To Leave: Send an email to > > Archives: http://groups.yahoo.com/group/adsp > > Other Groups: http://www.dsprelated.com/groups.php3 > > Yahoo! Groups Links |
