DSPRelated.com
Forums

Blackfin clock configuration under the VDK

Started by mwdawson62 October 25, 2004


I'm using the VDK for a blackfin project. Its not clear how to
configure the core and system clock. The kernel tab has a nice "clock
frequency" parameter that you can set but I can't find any
explanation of what it does with this. How does the setup code know
the oscillator input frequency to the processor? (I have a feeling it
just assumes you are using the EZ-Kit with a 27Mhz oscillator.) What
does it set the system clock frequency to? There was a nice app note
on the c-runtime header that explained how to do all this when you
are not using the VDK. I can't find anything comparable for the VDK.

Has anybody out there used the VDK on a real project. I can't tell
whether its a great kernel with poor documentation or just some half
baked thing that analog devices threw out there. Why aren't there
more app notes about it?





Hi,

I'm using VDK in a relative complex project, and I also think there is
insufficient documentation concerning it.

The clock frequency parameter in VKD configuration tab only tells Blackfin
the core clock value; it uses this information to calculate how many clock
cycles corresponds to one tick.

The link between xtal frequency (your board's crystal value) and the core
clock is given by the registers PLL_MSEL, PLL_CSEL and PLL_SSEL.

There is a rule of thumb to configure these registers, described in
Blackfins example init_code (\Analog Devices\VisualDSP 3.5
16-Bit\Blackfin\ldr); you can just copy this assembly code to your project.

Analog Devices really doesn't give much attention to VDK, it's hard to find
specific app notes describing it's configuration and behavior.

There are more bugs I've found in practice (much time lost...) concerning
the simultaneous use of VDK, ICE, EzKit and memory mapping.

Regards,
Eduardo Azevedo.
Biomedical Engineering.

-------------------------- At 15:35 25/10/2004 +0000, you wrote:
>I'm using the VDK for a blackfin project. Its not clear how to
>configure the core and system clock. The kernel tab has a nice "clock
>frequency" parameter that you can set but I can't find any
>explanation of what it does with this. How does the setup code know
>the oscillator input frequency to the processor? (I have a feeling it
>just assumes you are using the EZ-Kit with a 27Mhz oscillator.) What
>does it set the system clock frequency to? There was a nice app note
>on the c-runtime header that explained how to do all this when you
>are not using the VDK. I can't find anything comparable for the VDK.
>
>Has anybody out there used the VDK on a real project. I can't tell
>whether its a great kernel with poor documentation or just some half
>baked thing that analog devices threw out there. Why aren't there
>more app notes about it? >_____________________________________
>Note: If you do a simple "reply" with your email client, only the author
>of this message will receive your answer. You need to do a "reply all" if
>you want your answer to be distributed to the entire group.
>
>_____________________________________
>About this discussion group:
>
>To Join: Send an email to
>
>To Post: Send an email to
>
>To Leave: Send an email to
>
>Archives: http://groups.yahoo.com/group/adsp
>
>Other Groups: http://www.dsprelated.com/groups.php3
>
>Yahoo! Groups Links >
>





Thanks for the prompt reply.

This was exactly the information I needed. I thought the VDK startup
code was setting up the clock control registers (PLL_CSEL) but really
its expecting the application to do it.

It seems like the memory footprint of the VDK is big when
instrumentation is enabled. My very simple starter project takes up
30k of code space. Are you able to build with instrumentation enabled
on a routine basis or do you just turn all this stuff off? My target
has a lot of off chip memory (32mb) but I'm leary of moving kernel
code off chip. --- In , Eduardo <eduardop@p...> wrote:
>
> Hi,
>
> I'm using VDK in a relative complex project, and I also think there
is
> insufficient documentation concerning it.
>
> The clock frequency parameter in VKD configuration tab only tells
Blackfin
> the core clock value; it uses this information to calculate how
many clock
> cycles corresponds to one tick.
>
> The link between xtal frequency (your board's crystal value) and
the core
> clock is given by the registers PLL_MSEL, PLL_CSEL and PLL_SSEL.
>
> There is a rule of thumb to configure these registers, described in
> Blackfins example init_code (\Analog Devices\VisualDSP 3.5
> 16-Bit\Blackfin\ldr); you can just copy this assembly code to your
project.
>
> Analog Devices really doesn't give much attention to VDK, it's hard
to find
> specific app notes describing it's configuration and behavior.
>
> There are more bugs I've found in practice (much time lost...)
concerning
> the simultaneous use of VDK, ICE, EzKit and memory mapping.
>
> Regards,
> Eduardo Azevedo.
> Biomedical Engineering.
>
> -------------------------- > At 15:35 25/10/2004 +0000, you wrote: >
> >I'm using the VDK for a blackfin project. Its not clear how to
> >configure the core and system clock. The kernel tab has a
nice "clock
> >frequency" parameter that you can set but I can't find any
> >explanation of what it does with this. How does the setup code know
> >the oscillator input frequency to the processor? (I have a feeling
it
> >just assumes you are using the EZ-Kit with a 27Mhz oscillator.)
What
> >does it set the system clock frequency to? There was a nice app
note
> >on the c-runtime header that explained how to do all this when you
> >are not using the VDK. I can't find anything comparable for the
VDK.
> >
> >Has anybody out there used the VDK on a real project. I can't tell
> >whether its a great kernel with poor documentation or just some
half
> >baked thing that analog devices threw out there. Why aren't there
> >more app notes about it?
> >
> >
> >
> >
> >
> >
> >
> >
> >_____________________________________
> >Note: If you do a simple "reply" with your email client, only the
author
> >of this message will receive your answer. You need to do a "reply
all" if
> >you want your answer to be distributed to the entire group.
> >
> >_____________________________________
> >About this discussion group:
> >
> >To Join: Send an email to
> >
> >To Post: Send an email to
> >
> >To Leave: Send an email to
> >
> >Archives: http://groups.yahoo.com/group/adsp
> >
> >Other Groups: http://www.dsprelated.com/groups.php3
> >
> >Yahoo! Groups Links
> >
> >
> >
> >





Hi,

Actually, VDK starts with some default values for PLL registers (I dont
know why), so you must configure them through a pre-loader code.

On the EzKit, the solution we employed was to include the init code - in
assembly - directly at the first SRAM address (0xFF800000 for BF533;
0xFFA00000 for BF532 and BF531), followed by a jump to your main code
address. So, at startup, this routine will automatically run and configure
some critical parameters, like PLL, SDRAM, FLASH, etc.

If you are loading your program to your target FLASH (through the .LDR),
there is an option at: menu project / program options / load /
initialization file, that lets you enable a init file pre-fetch (like the
example included in VDSP++3.5).

Turning off instrumentation level, decreasing history length and thread's
stack size will reduce VDK's memory appetite.

It seems to me that you have build your own target board (otherwise you
would have a lot of external SDRAM already available at EzKit)...

Without the external SDRAM, my first VDKs projects always ran out of
memory! The only solution I found was to use a 32MB SDRAM to store
practically all the code and data.

There is an issue concerning the correct placement of VDK objects in
external memory... It seems that VDK doesn't like to be allocated outside
SRAM. I can't realize why it happens, but I had a lot of trouble - in
extensive codes - when VDK overloads to SDRAM.

Best wishes!

Eduardo Azevedo.
Biomedical Enginner
CMOS Medical

---
At 20:00 25/10/2004 +0000, you wrote:
>Thanks for the prompt reply.
>
>This was exactly the information I needed. I thought the VDK startup
>code was setting up the clock control registers (PLL_CSEL) but really
>its expecting the application to do it.
>
>It seems like the is big when
>instrumentation is enabled. My very simple starter project takes up
>30k of code space. Are you able to build with instrumentation enabled
>on a routine basis or do you just turn all this stuff off? My target
>has a lot of off chip memory (32mb) but I'm leary of moving kernel
>code off chip. >--- In , Eduardo <eduardop@p...> wrote:
> >
> > Hi,
> >
> > I'm using VDK in a relative complex project, and I also think there
>is
> > insufficient documentation concerning it.
> >
> > The clock frequency parameter in VKD configuration tab only tells
>Blackfin
> > the core clock value; it uses this information to calculate how
>many clock
> > cycles corresponds to one tick.
> >
> > The link between xtal frequency (your board's crystal value) and
>the core
> > clock is given by the registers PLL_MSEL, PLL_CSEL and PLL_SSEL.
> >
> > There is a rule of thumb to configure these registers, described in
> > Blackfins example init_code (\Analog Devices\VisualDSP 3.5
> > 16-Bit\Blackfin\ldr); you can just copy this assembly code to your
>project.
> >
> > Analog Devices really doesn't give much attention to VDK, it's hard
>to find
> > specific app notes describing it's configuration and behavior.
> >
> > There are more bugs I've found in practice (much time lost...)
>concerning
> > the simultaneous use of VDK, ICE, EzKit and memory mapping.
> >
> > Regards,
> > Eduardo Azevedo.
> > Biomedical Engineering.
> >
> > --------------------------
> >
> >
> > At 15:35 25/10/2004 +0000, you wrote:
> >
> >
> >
> > >I'm using the VDK for a blackfin project. Its not clear how to
> > >configure the core and system clock. The kernel tab has a
>nice "clock
> > >frequency" parameter that you can set but I can't find any
> > >explanation of what it does with this. How does the setup code know
> > >the oscillator input frequency to the processor? (I have a feeling
>it
> > >just assumes you are using the EZ-Kit with a 27Mhz oscillator.)
>What
> > >does it set the system clock frequency to? There was a nice app
>note
> > >on the c-runtime header that explained how to do all this when you
> > >are not using the VDK. I can't find anything comparable for the
>VDK.
> > >
> > >Has anybody out there used the VDK on a real project. I can't tell
> > >whether its a great kernel with poor documentation or just some
>half
> > >baked thing that analog devices threw out there. Why aren't there
> > >more app notes about it?
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >_____________________________________
> > >Note: If you do a simple "reply" with your email client, only the
>author
> > >of this message will receive your answer. You need to do a "reply
>all" if
> > >you want your answer to be distributed to the entire group.
> > >
> > >_____________________________________
> > >About this discussion group:
> > >
> > >To Join: Send an email to
> > >
> > >To Post: Send an email to
> > >
> > >To Leave: Send an email to
> > >
> > >Archives: http://groups.yahoo.com/group/adsp
> > >
> > >Other Groups: http://www.dsprelated.com/groups.php3
> > >
> > >Yahoo! Groups Links
> > >
> > >
> > >
> > >_____________________________________
>Note: If you do a simple "reply" with your email client, only the author
>of this message will receive your answer. You need to do a "reply all" if
>you want your answer to be distributed to the entire group.
>
>_____________________________________
>About this discussion group:
>
>To Join: Send an email to
>
>To Post: Send an email to
>
>To Leave: Send an email to
>
>Archives: http://groups.yahoo.com/group/adsp
>
>Other Groups: http://www.dsprelated.com/groups.php3
>
>Yahoo! Groups Links >
>