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Are you using VisualDSP++ as your environment? If so, you can use the "Expert Linker" (right click on the linder file in the project window on the left side of the environment) to visually resize your segments and to assign your input sections. The "Expert Linker" won't let you overlap or place segments in the wrong space. In any case, start with one of the ldf files in the examples supplied and try to compile your program and see if it fits. At 05:25 PM 2/15/2005, Giovanni wrote: >Hello everybody. >I have some little doubts about the use of sections in Blackfin 533 DSP. >In fact I saw the example proposed in "C/C++ Compiler and Library", >where is explained how you can edit the memory and section parts of the >LDF file. However I didn't find the constraints that I have to observe >when I want to select the start_address and end_address of the memory >bank. I don't understand the mappings that exists between the memory >banks and the hardware memory. In fact, for example, I know that in the >C67x1 DSP from Texas Instruments memory is composed of different bank, >and each of them can be accessed in parallel. However this is not true >for BF533 (or may be I didn't understand nothing). >Is there someone that can explain me that? Or that can address me to the >documents that contain the answers to my questions? >Thanks lot to everybody > > Steve Holle Link Communications, Inc. 1035 Cerise Rd. Billings, MT 59101 |
Re: Memory banks and section in LDF file
Started by ●February 15, 2005
Reply by ●February 15, 20052005-02-15
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Hello everybody. I have some little doubts about the use of sections in Blackfin 533 DSP. In fact I saw the example proposed in "C/C++ Compiler and Library", where is explained how you can edit the memory and section parts of the LDF file. However I didn't find the constraints that I have to observe when I want to select the start_address and end_address of the memory bank. I don't understand the mappings that exists between the memory banks and the hardware memory. In fact, for example, I know that in the C67x1 DSP from Texas Instruments memory is composed of different bank, and each of them can be accessed in parallel. However this is not true for BF533 (or may be I didn't understand nothing). Is there someone that can explain me that? Or that can address me to the documents that contain the answers to my questions? Thanks lot to everybody |
Reply by ●February 16, 20052005-02-16
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Hai Giovanni, Tracking the memory banks for BF533 is pretty simple if you use the Expert Linker tool in VDSP++ you can see the mapping entirely in a GUI format and varying the memory size can be done just by dragging at the borders of the particular memory location or else to get the entire memory map of the code you can just create the map file which is of .xml format from the Linker tab in project options which is outputted at your output directory. Try this... Bye, With regards Yuvaraj On Tue, 15 Feb 2005 16:25:12 -0800, Giovanni <> wrote: > > > Hello everybody. > I have some little doubts about the use of sections in Blackfin 533 DSP. > In fact I saw the example proposed in "C/C++ Compiler and Library", > where is explained how you can edit the memory and section parts of the > LDF file. However I didn't find the constraints that I have to observe > when I want to select the start_address and end_address of the memory > bank. I don't understand the mappings that exists between the memory > banks and the hardware memory. In fact, for example, I know that in the > C67x1 DSP from Texas Instruments memory is composed of different bank, > and each of them can be accessed in parallel. However this is not true > for BF533 (or may be I didn't understand nothing). > Is there someone that can explain me that? Or that can address me to the > documents that contain the answers to my questions? > Thanks lot to everybody > > |
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Reply by ●February 16, 20052005-02-16
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I don't have a Blackfin manual, but in the SHARC family the memory layout is in the Hardware Reference under the Memory subheading. If you don't have a copy of the manual you can download it from this link : http://www.analog.com/Processors/Processors/blackfin/technicalLibrary/manuals/blackfinIndex.html#Processor%20Manuals At 10:13 AM 2/16/2005, Giovanni wrote: >First of all thanks a lot to Yuvaraj and Steve. >I will tray to use Expert linket as suggested. >However, where can I find an explanation for the hardware interpretion >of the memory bank? It could be very interesting for my job. >Thanks a lot, Giovanni > >Yuvaraj C wrote: > > >Hai Giovanni, > > > >Tracking the memory banks for BF533 is pretty simple if you use the > >Expert Linker tool in VDSP++ you can see the mapping entirely in a GUI > >format and varying the memory size can be done just by dragging at the > >borders of the particular memory location or else to get the entire > >memory map of the code you can just create the map file which is of > >.xml format from the Linker tab in project options which is outputted > >at your output directory. > > > >Try this... > >Bye, > >With regards > >Yuvaraj > > > > > >On Tue, 15 Feb 2005 16:25:12 -0800, Giovanni <> > wrote: > > > > > >>Hello everybody. > >>I have some little doubts about the use of sections in Blackfin 533 DSP. > >>In fact I saw the example proposed in "C/C++ Compiler and Library", > >>where is explained how you can edit the memory and section parts of the > >>LDF file. However I didn't find the constraints that I have to observe > >>when I want to select the start_address and end_address of the memory > >>bank. I don't understand the mappings that exists between the memory > >>banks and the hardware memory. In fact, for example, I know that in the > >>C67x1 DSP from Texas Instruments memory is composed of different bank, > >>and each of them can be accessed in parallel. However this is not true > >>for BF533 (or may be I didn't understand nothing). > >>Is there someone that can explain me that? Or that can address me to the > >>documents that contain the answers to my questions? > >>Thanks lot to everybody > >> > >> > >> > >> > >> > >> > >> > >> > >> > > > > > Steve Holle Link Communications, Inc. 1035 Cerise Rd. Billings, MT 59101 |
Reply by ●February 16, 20052005-02-16
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First of all thanks a lot to Yuvaraj and Steve. I will tray to use Expert linket as suggested. However, where can I find an explanation for the hardware interpretion of the memory bank? It could be very interesting for my job. Thanks a lot, Giovanni Yuvaraj C wrote: >Hai Giovanni, > >Tracking the memory banks for BF533 is pretty simple if you use the >Expert Linker tool in VDSP++ you can see the mapping entirely in a GUI >format and varying the memory size can be done just by dragging at the >borders of the particular memory location or else to get the entire >memory map of the code you can just create the map file which is of >.xml format from the Linker tab in project options which is outputted >at your output directory. > >Try this... >Bye, >With regards >Yuvaraj >On Tue, 15 Feb 2005 16:25:12 -0800, Giovanni <> wrote: >>Hello everybody. >>I have some little doubts about the use of sections in Blackfin 533 DSP. >>In fact I saw the example proposed in "C/C++ Compiler and Library", >>where is explained how you can edit the memory and section parts of the >>LDF file. However I didn't find the constraints that I have to observe >>when I want to select the start_address and end_address of the memory >>bank. I don't understand the mappings that exists between the memory >>banks and the hardware memory. In fact, for example, I know that in the >>C67x1 DSP from Texas Instruments memory is composed of different bank, >>and each of them can be accessed in parallel. However this is not true >>for BF533 (or may be I didn't understand nothing). >>Is there someone that can explain me that? Or that can address me to the >>documents that contain the answers to my questions? >>Thanks lot to everybody >> >> >> >> >> >> >> >> > > |
