With the ADSP-21369, DMA channels with rotating priority means
rotating on a access by access basis. I was hoping it meant on a DMA
completion basis. To achieve that, do I have to manipulate the EPCTL
channel priority bits?
I was hoping to alternate chained DMA transfers between EP0 and EP1 so
as EP0 is reloading its TCB, EP1 is transferring. This would
hopefully lower reload overhead to zero. I came up with the scheme in
the next paragraph, but it still incurs some overhead.
A solution to allow EP0 to complete while EP1 is pending requires
giving channel 0 priority until it finishes and then in the EP0 ISR,
assigning priority to EP1 and reloading the EP0 chain pointer manually
versus actually chaining the DMA blocks. When EP1 finishes, in the EP1
ISR, assign priority to EP0 and reload the EP1 chain pointer.
Does anyone have a better way to do this?
To control DMA transfers, there are two sets of bits in the EPCTL
register:
*********************************
DMAPR (manual is incorrect, these are the assignments)
DMA channel Priority for CH0 and CH1
11 = Rotating priority
10 = Priority to channel 0
01 = Priority to channel 1
00 = Reserved
*********************************
EPBR
External Port Bus Priority
11 = Rotating Priority
10 = Core has high priority
01 = DMA has high priority
00 = Reserved
*********************************
21369 - rotating versus fixed priority - DMA_EP0 and DMA_EP1
Started by ●March 21, 2006
