Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
New comer Question in ADSP-BF533
Started by ●July 25, 2007
Reply by ●July 25, 20072007-07-25
Hi,
The CCLK and SCLK are derived from CLK_IN of the processor. Programmable PLL
unit of BF processor allows you to configure different values of cCLK and
SCLK.
The CCLK and SCLK values depends on DF/PLL_CTL, MSEL/PLL_CTL,
BYPASS/PLL_DIV, SSEL/PLL_DIV and CSEL/PLL_DIV fields . Figure 8-1 in the
"BF-533 HRM" depicts it very clearly.
To know the value of CCLK and SCLK you need to know three things
(1) Formula to compute SCLK and CCLK from CLK_IN
Read the chapter-8 of "BF-533 HRM" to get this relation.
(2) Value of CLK_IN - you can measure it on the board, or know it from the
specification of parts (crystal) being used.
(3) Values of different fields in that formula
The value of different fields can be obtained by reading the PLL_CTL and
PLL_DIV Registers.
As you are a beginner, it will be very useful for you, if you refer to the
"BF-533 HRM" in detail. It will help you to get a fair idea abour processor
and ramp up quickly.
Regards,
Kunal
www.singhkunal.com
On 7/24/07, malli_1729 wrote:
>
> Hi!
>
> Iam new to the DSP processors.....
>
> I have a small doubt...
> Actually in the datasheets they are giving that BF533 can work upto
> 600MHz(maximum performance)...and SCLK 133Mhz....
>
> When iam working with the BF533ez-kit lite, how would i know that it is
> running at Coreclk and SCLK...
>
> PLease help........????????
>
>
>
--
www.singhkunal.com
---
For a system, LIFO and FILO mean the same. For individuals in the system,
they mean opposite.
The CCLK and SCLK are derived from CLK_IN of the processor. Programmable PLL
unit of BF processor allows you to configure different values of cCLK and
SCLK.
The CCLK and SCLK values depends on DF/PLL_CTL, MSEL/PLL_CTL,
BYPASS/PLL_DIV, SSEL/PLL_DIV and CSEL/PLL_DIV fields . Figure 8-1 in the
"BF-533 HRM" depicts it very clearly.
To know the value of CCLK and SCLK you need to know three things
(1) Formula to compute SCLK and CCLK from CLK_IN
Read the chapter-8 of "BF-533 HRM" to get this relation.
(2) Value of CLK_IN - you can measure it on the board, or know it from the
specification of parts (crystal) being used.
(3) Values of different fields in that formula
The value of different fields can be obtained by reading the PLL_CTL and
PLL_DIV Registers.
As you are a beginner, it will be very useful for you, if you refer to the
"BF-533 HRM" in detail. It will help you to get a fair idea abour processor
and ramp up quickly.
Regards,
Kunal
www.singhkunal.com
On 7/24/07, malli_1729 wrote:
>
> Hi!
>
> Iam new to the DSP processors.....
>
> I have a small doubt...
> Actually in the datasheets they are giving that BF533 can work upto
> 600MHz(maximum performance)...and SCLK 133Mhz....
>
> When iam working with the BF533ez-kit lite, how would i know that it is
> running at Coreclk and SCLK...
>
> PLease help........????????
>
>
>
--
www.singhkunal.com
---
For a system, LIFO and FILO mean the same. For individuals in the system,
they mean opposite.
Reply by ●July 25, 20072007-07-25
Hi,
Load the executable and check the PLL Control registers!
Best Regards,
Harish
_____
From: malli_1729 [mailto:m...@yahoo.co.in]
Sent: Wednesday, July 25, 2007 10:07 AM
To: a...
Subject: [adsp] New comer Question in ADSP-BF533
Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
-------------------DISCLAIMER------------------
The information transmitted herewith is confidential and proprietary information intended only for use by the individual or entity to which it is addressed. If the reader of this message is not the intended recipient, you are hereby notified that any review, retransmission, dissemination, distribution, copying or other use of, or taking of any action in reliance upon this information is strictly prohibited. If you have received this communication in error, please contact the sender and delete the material from your computer.
--------------------
Load the executable and check the PLL Control registers!
Best Regards,
Harish
_____
From: malli_1729 [mailto:m...@yahoo.co.in]
Sent: Wednesday, July 25, 2007 10:07 AM
To: a...
Subject: [adsp] New comer Question in ADSP-BF533
Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
-------------------DISCLAIMER------------------
The information transmitted herewith is confidential and proprietary information intended only for use by the individual or entity to which it is addressed. If the reader of this message is not the intended recipient, you are hereby notified that any review, retransmission, dissemination, distribution, copying or other use of, or taking of any action in reliance upon this information is strictly prohibited. If you have received this communication in error, please contact the sender and delete the material from your computer.
--------------------
Reply by ●July 25, 20072007-07-25
Hi,
The Clock In frequency to the BF533 on the EZKIT is 27 MHz. This is stepped
up by an onboard PLL and then divided down to get the CCLK and SCLK
frequencies (Core and system clocks, respectively). (The maximum CCLK you
can get with a 27 MHz CLKIN is 594 MHz.) You can open up the PLL Register
File window in VDSP and look at the register values for PLL_CTL and PLL_DIV.
You will need to look at the hardware ref manual to see fields in the
registers (such as multiplier ration, divider ratio, etc). Chapter 8 of the
HW reference has a very good discussion on how clocking works on the
Blackfin.
Cheers,
George Kadziolka
www.kaztek.com
_____
From: a... [mailto:a...] On Behalf Of
malli_1729
Sent: Wednesday, July 25, 2007 12:37 AM
To: a...
Subject: [adsp] New comer Question in ADSP-BF533
Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
The Clock In frequency to the BF533 on the EZKIT is 27 MHz. This is stepped
up by an onboard PLL and then divided down to get the CCLK and SCLK
frequencies (Core and system clocks, respectively). (The maximum CCLK you
can get with a 27 MHz CLKIN is 594 MHz.) You can open up the PLL Register
File window in VDSP and look at the register values for PLL_CTL and PLL_DIV.
You will need to look at the hardware ref manual to see fields in the
registers (such as multiplier ration, divider ratio, etc). Chapter 8 of the
HW reference has a very good discussion on how clocking works on the
Blackfin.
Cheers,
George Kadziolka
www.kaztek.com
_____
From: a... [mailto:a...] On Behalf Of
malli_1729
Sent: Wednesday, July 25, 2007 12:37 AM
To: a...
Subject: [adsp] New comer Question in ADSP-BF533
Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
Reply by ●July 26, 20072007-07-26
malli_1729 wrote:
> Hi!
>
> Iam new to the DSP processors.....
>
> I have a small doubt...
> Actually in the datasheets they are giving that BF533 can work upto
> 600MHz(maximum performance)...and SCLK 133Mhz....
>
> When iam working with the BF533ez-kit lite, how would i know that it is
> running at Coreclk and SCLK...
>
> PLease help........????????
You should get a copy of the BF533 Hardware ref. manual if you
don't already have one..
http://www.analog.com/processors/blackfin/technicalLibrary/manuals/index.html
Look at the values in registers PLL_CTL and PLL_DIV.
Regards
--
Adrian Hey
> Hi!
>
> Iam new to the DSP processors.....
>
> I have a small doubt...
> Actually in the datasheets they are giving that BF533 can work upto
> 600MHz(maximum performance)...and SCLK 133Mhz....
>
> When iam working with the BF533ez-kit lite, how would i know that it is
> running at Coreclk and SCLK...
>
> PLease help........????????
You should get a copy of the BF533 Hardware ref. manual if you
don't already have one..
http://www.analog.com/processors/blackfin/technicalLibrary/manuals/index.html
Look at the values in registers PLL_CTL and PLL_DIV.
Regards
--
Adrian Hey
Reply by ●July 26, 20072007-07-26
In the Device Drivers and System Services Manual for Blackfin Processors please
take a look at the adi_pwr_GetFreq() API. You can use it to obtain the core and
system clock frequencies. However before calling adi_pwr_GetFreq() you will have
to call adi_pwr_Init() to initialize the power management module. If you have
VisualDSP++ first get it to work using the simulator and then try it out using
the target.
If you are quite new to BF DSPs then please take a look at the online training tutorials located at,
http://my.analog.com/onlinetraining/Static/BOLDList.html
Particularly take a look at,
* Introduction to VisualDSP++ Tools (Jan. 2006) (if you have VisualDSP++)
* Basics of Building a Blackfin Application (Jan. 2006)
* Blackfin System Services (Jan. 2006) (this one talks about the power management module that I mentioned earlier)
HTH,
Chamira.
malli_1729 wrote: Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
If you are quite new to BF DSPs then please take a look at the online training tutorials located at,
http://my.analog.com/onlinetraining/Static/BOLDList.html
Particularly take a look at,
* Introduction to VisualDSP++ Tools (Jan. 2006) (if you have VisualDSP++)
* Basics of Building a Blackfin Application (Jan. 2006)
* Blackfin System Services (Jan. 2006) (this one talks about the power management module that I mentioned earlier)
HTH,
Chamira.
malli_1729 wrote: Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
Reply by ●July 26, 20072007-07-26
Adding to my post: I forgot to mention that to make use of the system services
APIs you need to have VisualDSP++ installed on your PC.
Chamira.
Chamira Perera wrote: In the Device Drivers and System Services Manual for Blackfin Processors please take a look at the adi_pwr_GetFreq() API. You can use it to obtain the core and system clock frequencies. However before calling adi_pwr_GetFreq() you will have to call adi_pwr_Init() to initialize the power management module. If you have VisualDSP++ first get it to work using the simulator and then try it out using the target.
If you are quite new to BF DSPs then please take a look at the online training tutorials located at,
http://my.analog.com/onlinetraining/Static/BOLDList.html
Particularly take a look at,
* Introduction to VisualDSP++ Tools (Jan. 2006) (if you have VisualDSP++)
* Basics of Building a Blackfin Application (Jan. 2006)
* Blackfin System Services (Jan. 2006) (this one talks about the power management module that I mentioned earlier)
HTH,
Chamira.
malli_1729 wrote: Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
---------------------------------
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Chamira.
Chamira Perera wrote: In the Device Drivers and System Services Manual for Blackfin Processors please take a look at the adi_pwr_GetFreq() API. You can use it to obtain the core and system clock frequencies. However before calling adi_pwr_GetFreq() you will have to call adi_pwr_Init() to initialize the power management module. If you have VisualDSP++ first get it to work using the simulator and then try it out using the target.
If you are quite new to BF DSPs then please take a look at the online training tutorials located at,
http://my.analog.com/onlinetraining/Static/BOLDList.html
Particularly take a look at,
* Introduction to VisualDSP++ Tools (Jan. 2006) (if you have VisualDSP++)
* Basics of Building a Blackfin Application (Jan. 2006)
* Blackfin System Services (Jan. 2006) (this one talks about the power management module that I mentioned earlier)
HTH,
Chamira.
malli_1729 wrote: Hi!
Iam new to the DSP processors.....
I have a small doubt...
Actually in the datasheets they are giving that BF533 can work upto
600MHz(maximum performance)...and SCLK 133Mhz....
When iam working with the BF533ez-kit lite, how would i know that it is
running at Coreclk and SCLK...
PLease help........????????
---------------------------------
Choose the right car based on your needs. Check out Yahoo! Autos new Car Finder tool.
