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greetings!!! i intend to implement a PLL using lmx 2326 a dedicated PLL chip.. and control it using 2181. LMX 2326 accepts data as 21bits.. serially.. but adsp can send data only as word lengths of 3-16.. one solution that i have come up with is to use 2181 with a 7-bit word length and transmit 3 such words. (i am thinking on the lines of autobuffering) the problem lies with the fact that LMX 2326 desires a LE (latch enable ) signal in one of the two following modes: 1. An active high pulse at the end of data transfer (after all 21 bits are recieved) 2. an active low gating signal.. that goes low before the data transmission and stays low till atleast 50ns after the data transmission is complete. i was thinking on the lines of using the alternate framing mode with inverted TFS INVTFS .. but i don't think it would remain low for the desired time (50ns) after the transmission is complete. is there a better way? Please also send me more info about lmx2326 and autobuffereing mode of 2181 i am using the VisualDSP ver 2.0 regards manish |
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PLL implementation using lmx2326 and adsp2181
Started by ●February 20, 2002
Reply by ●February 20, 20022002-02-20
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You have 2 options 1. Don't bother using the serial lines of the adsp. Use the general purpose I/O lines and bit bang them to generate a clock and data. Use another I/O line for the LE. It will be slightly slower than a serial method and you have to write a little extra code, but it will be simpler. 2. Use the method you suggested, 3 sets of 7 bits (or any other combination) and use an I/O line for your LE lines. Don't bother trying to get the frame sync to act as your LE. I've never used either of your chips (so I can't give you code or any specifics on the chips), but what I said should apply for any set of processors and peripheral device. Cheers Bhaskar --- In adsp@y..., manish marwaha <manish_marwaha@y...> wrote: > greetings!!! > > i intend to implement a PLL using lmx 2326 a dedicated PLL chip.. and control it using 2181. > > LMX 2326 accepts data as 21bits.. serially.. > > but adsp can send data only as word lengths of 3-16.. > > one solution that i have come up with is to use 2181 with a 7-bit word length and transmit 3 such words. (i am thinking on the lines of autobuffering) > > the problem lies with the fact that LMX 2326 desires a LE (latch enable ) signal in one of the two following modes: > > 1. An active high pulse at the end of data transfer (after all 21 bits are recieved) > > 2. an active low gating signal.. that goes low before the data transmission and stays low till atleast 50ns after the data transmission is complete. > > i was thinking on the lines of using the alternate framing mode with inverted TFS INVTFS .. but i don't think it would remain low for the desired time (50ns) after the transmission is complete. > > is there a better way? > > Please also send me more info about lmx2326 and autobuffereing mode of 2181 > > i am using the VisualDSP ver 2.0 > > regards > > manish |
Reply by ●February 20, 20022002-02-20
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At 03:13 AM 2/20/2002 -0800, manish marwaha wrote: >greetings!!! > >i intend to implement a PLL using lmx 2326 a dedicated PLL chip.. and >control it using 2181. > >LMX 2326 accepts data as 21bits.. serially.. > >but adsp can send data only as word lengths of 3-16.. > >one solution that i have come up with is to use 2181 with a 7-bit word >length and transmit 3 such words. (i am thinking on the lines of autobuffering) > >the problem lies with the fact that LMX 2326 desires a LE (latch enable ) >signal in one of the two following modes: > >1. An active high pulse at the end of data transfer (after all 21 bits are >recieved) > >2. an active low gating signal.. that goes low before the data >transmission and stays low till atleast 50ns after the data transmission >is complete. > >i was thinking on the lines of using the alternate framing mode with >inverted TFS INVTFS .. but i don't think it would remain low for the >desired time (50ns) after the transmission is complete. > >is there a better way? > >Please also send me more info about lmx2326 and autobuffereing mode of 2181 > >i am using the VisualDSP ver 2.0 > >regards > >manish > I don't think alternate framing is going to work. You might look at creating your interface using a little glue logic and Sport0 in TDM mode. You could also look at the Sharc which can be set for word lengths up to 32 bits. Al Clark Danville Signal Processing, Inc. |
