I am using the '5410 eval board from Spectrum Digital and the TI
emulator. I have a question about Interrupt Service Routines. I am
using mnemonic assembly language only.
The way I understand it, when the CPU receives an interrupt from the
DMA, it jumps to the interrupt location (in my case 5ch), and reads the
branch instruction at this location to get to the ISR. What is the best
way to get the branch instruction into 5ch? Should I store the opcode
to 5ch and the address I want it to go to in 5dh?
Also, once I get the ISR written, how should I get it to reside at the
program memory location that I want? For example, if I tell the CPU in
the branch instruction that I want it to branch to at 1000h, how should
I tell the compiler to put my ISR there? I have looked through the
documentation, and have been unable to decipher what the best way to do
Any help would be greatly appreciated.
Acoustic Positioning Research
Started by ●July 8, 1999