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Data and Address buses are inactive !

Started by hass...@yahoo.com July 3, 2007
All, hi

I design a relatively simple board consisting of a TMS320VC5416, a Flash memory, and a FPGA.

I use the Flash to place my code.

To program the flash, I declare it external in data space (DROM = 0). I connect the data and address buses directly from DSP to the Flash memory. Further, I make OE, WE, and CE signals of the Flash using MSTRB#, DS# and R/W# signals of DSP.

The MSTRB#, DS# and R/W# signals of DSP active, however, I don't see any change on data and address buses of DSP.
I also write a simple program to examine I/O signals of DSP. Strangle not only address and data bus are inactive, But IS# and IOSTRB# are also inactive.

I will be thankful if state your opinions.

Thanks,
-Farhad
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h...@yahoo.com wrote:
> All, hi
>
> I design a relatively simple board consisting of a TMS320VC5416, a Flash memory, and a FPGA.
>
> I use the Flash to place my code.
>
> To program the flash, I declare it external in data space (DROM = 0). I connect the data and address buses directly from DSP to the Flash memory. Further, I make OE, WE, and CE signals of the Flash using MSTRB#, DS# and R/W# signals of DSP.
>
> The MSTRB#, DS# and R/W# signals of DSP active, however, I don't see any change on data and address buses of DSP.
> I also write a simple program to examine I/O signals of DSP. Strangle not only address and data bus are inactive, But IS# and IOSTRB# are also inactive.
>
> I will be thankful if state your opinions.
>

Its been a bit since I touched a DSP, but I think you also need to have
the MP/MC line pulled the correct direction in order to boot from the
flash.

You might take a look at the bootloader app note for the C54XX family,
it covers all the different boot sources and how to make sure the
correct one is selected.

Brian

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Software, Linux, Microcontrollers http://www.brianlane.com
AIS Parser SDK http://www.aisparser.com

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Version: GnuPG v1.4.7 (Darwin)
Comment: Remember Lexington Green!

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Hi again

Brain Thanks for your reply.

About your point about MP/MC#.
My board is correctly starting up. I am also running a relatively complex program and debugging it through emulator. Therefore, I think at this time setting of MP/MC# pin is not problem (It is set to zero.)
Moreover, at this time at first I want to program the flash, so define it in data space between 0x8000 and 0xFFFF.

I will be thankful if state your opinion.

Best Regards,
- Farhad

Brian Lane wrote:
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

h...@yahoo.com wrote:
> All, hi
>
> I design a relatively simple board consisting of a TMS320VC5416, a Flash memory, and a FPGA.
>
> I use the Flash to place my code.
>
> To program the flash, I declare it external in data space (DROM = 0). I connect the data and address buses directly from DSP to the Flash memory. Further, I make OE, WE, and CE signals of the Flash using MSTRB#, DS# and R/W# signals of DSP.
>
> The MSTRB#, DS# and R/W# signals of DSP active, however, I don't see any change on data and address buses of DSP.
> I also write a simple program to examine I/O signals of DSP. Strangle not only address and data bus are inactive, But IS# and IOSTRB# are also inactive.
>
> I will be thankful if state your opinions.
>

Its been a bit since I touched a DSP, but I think you also need to have
the MP/MC line pulled the correct direction in order to boot from the
flash.

You might take a look at the bootloader app note for the C54XX family,
it covers all the different boot sources and how to make sure the
correct one is selected.

Brian

- --
- ---[Office 73.2F]--[Outside 62.6F]--[Server 91.4F]--[Coaster 73.5F]---
- ---[ WENATCHEE WSF (366749710) @ 47 36.9426 -122 22.4449 ]---
Software, Linux, Microcontrollers http://www.brianlane.com
AIS Parser SDK http://www.aisparser.com

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.7 (Darwin)
Comment: Remember Lexington Green!

iD8DBQFGiyN6Iftj/pcSws0RAlKzAJ9bQOfZWE9KZeGZh+QLqwCYLtGF0wCfdAud
AzwXgHeRlvY7IJcu2BKpnOQ=heLa
-----END PGP SIGNATURE-----

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