JTAG emulator question

Started by Tim Shearer January 22, 2001
I have a two-processor dev board which I am debugging through an XDS510PP Plus JTAG emulator pod.  I have designed my interface hardware exactly as on page B-13 of the C54x Reference set, vol. 1.  It is sometimes possible to debug the two 'C5402s successfully, but I am regularly getting errors, due to the processor timing out.  This mainly seems to be a result of using breakpoints, and single stepping.  It also has difficulty halting the processor.   I am therefore assuming that the problem lies with the EMU0/1 signals.  These problems mainly occur with the 1st device in the scan chain.   Has anyone had any experience with multi-processor debugging...can you recommend a particular logic buffer? I am a bit worried that mine may be too slow. 
Thanks in advance,
Tim Shearer
Digital Design Engineer
BBM Electronics Group, Trantec Systems
E-Mail: t...@trantec.co.uk, Web: www.trantec.co.uk
Phone: +44 (0)20 8330 3388, Fax: +44 (0)20 8330 3222