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PLLCOUNT problem

Started by raphaelnegri December 27, 2009
I'm having some trouble on configuring my DSP C5402 to operate at 100 MHz, through the CLKMD register. The PLLCOUNT bits are calculated through the formula and the graph present in the image below.
However, in this graph from the 320C54x family, there is no 'lockup time' for a CLOCKOUT of 100 MHz. But the C5402 CAN operate at 100 MHz. Pretty weird, huh?
Wich value of 'lockup time' should I choose?

Formula and graph: http://img707.imageshack.us/img707/4555/lockup.jpg
Thanks,

Raphael

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The modular and extensible OMAP35x Evaluation Module (EVM) enables developers to start building applications based on the OMAP35x architecture: http://www.DSPRelated.com/omap35x
Raphael-

> I'm having some trouble on configuring my DSP C5402 to operate
> at 100 MHz, through the CLKMD register. The PLLCOUNT
> bits are calculated through the formula and the graph present
> in the image below.
> However, in this graph from the 320C54x family, there is no
> 'lockup time' for a CLOCKOUT of 100 MHz. But the C5402 CAN
> operate at 100 MHz. Pretty weird, huh?
> Wich value of 'lockup time' should I choose?
>
> Formula and graph: http://img707.imageshack.us/img707/4555/lockup.jpg

I haven't used C5402 for a long time, but suggest to start with a large amount of lock-up delay until you're sure it's
working and your code runs fine after changing the clock rate. Then you can fine-tune the settings.

You mention "having some trouble" -- do you just mean in deciding the lock-up delay? Or do you mean there you are
observing an actual software / hardware problem or bug?

-Jeff

OMAP35x EVM jump-starts low-power apps
The modular and extensible OMAP35x Evaluation Module (EVM) enables developers to start building applications based on the OMAP35x architecture: http://www.DSPRelated.com/omap35x