|
We are using a C5420 in our design. I cannot figure out how to boot the processor, since it does not have a bootloader in internal ROM. I am trying to figure a way to map the reset vector at 0xFF80 to external memory (an EEPROM) at reset, but the documentation is ambiguous. Is what I am trying to do possible? Thanks, Brian Marinari |
|
|
Booting C5420
Started by ●October 27, 1999
Reply by ●October 27, 19991999-10-27
|
At 04:14 PM 10/26/99 -0700, you wrote: >We are using a C5420 in our design. I cannot figure out how to boot >the >processor, since it does not have a bootloader in internal ROM. I am >trying >to figure a way to map the reset vector at 0xFF80 to external memory >(an >EEPROM) at reset, but the documentation is ambiguous. Is what I am >trying to >do possible? >Thanks, >Brian Marinari The reset vector on the C54x need a branch instruction. Put a branch instruction (to the address of your boot routine) at address 0xFF80 like this: .sect 0FF80h B _c_int00 ;initial boot routine address (_c_int00 is defined in T.I.'s RTS.SRC library) Bruno Bessette, ing. Universitde Sherbrooke EMAIL: TEL: (819) 821-8000 ext: 1937 FAX: (819) 821-7937 |
|
|
Reply by ●October 27, 19991999-10-27
|
That is indeed what I am trying to do. I am just not sure how to get that branch into memory. The C54x CPU and Peripherals Reference guide says that the reset vector must be at 0xFF80 in internal memory; one would assume that you would have to put it there using the Host Port Interface or something. However, we do not have another processor on the board to do this. I was wondering if I could map 0xFF80 to EXTERNAL memory and still have it work. The memory map lists the program section between 0x8000 and 0xFFFF as On-Chip SARAM 2 *and* External (EMIF). But it's not clear how I choose which. It looks like if I set EMIF mode (XIO=1, MP/MC = 1), it will be external. However, it appears that doing this will make ALL of program space map to external memory, so I would have nowhere to put the code I was booting! Ideally, I'd like to be able to move the code to SARAM3 and SARAM4. Brian bessette <> wrote: original article:http://www.egroups.com/group/c54x/?startc > At 04:14 PM 10/26/99 -0700, you wrote: > >We are using a C5420 in our design. I cannot figure out how to boot > >the > >processor, since it does not have a bootloader in internal ROM. I am > >trying > >to figure a way to map the reset vector at 0xFF80 to external memory > >(an > >EEPROM) at reset, but the documentation is ambiguous. Is what I am > >trying to > >do possible? > > > > > >Thanks, > >Brian Marinari > > > > > > The reset vector on the C54x need a branch instruction. Put a branch > instruction (to the address of your boot routine) at address 0xFF80 like this: > > .sect 0FF80h > B _c_int00 ;initial boot routine address (_c_int00 is > defined in T.I.'s RTS.SRC library) > Bruno Bessette, ing. > Universitde Sherbrooke > EMAIL: > TEL: (819) 821-8000 ext: 1937 > FAX: (819) 821-7937 > |
Reply by ●October 27, 19991999-10-27
|
I'm not using the '5420 ('5410 instead), and we're using the
bootloader, but we did consider booting directly from external memory. The pin MP/MC is sampled at start up and used to set the MP/MC bit in the PMST register. After this, you are free to change the value of the MP/MC bit. See the C54x Reference Set, Volume 1 (CPU & Peripherals), where it talks about the PMST register. -- Kevin J. Neden Software Designer Transmission Elements Dept., JDS Uniphase Corp. on 99-10-27 11:29:03 AM Please respond to To: cc: (bcc: Kevin Neden/HQ/JDS FITEL Inc) Subject: [c54x] Re: Booting C5420 That is indeed what I am trying to do. I am just not sure how to get that branch into memory. The C54x CPU and Peripherals Reference guide says that the reset vector must be at 0xFF80 in internal memory; one would assume that you would have to put it there using the Host Port Interface or something. However, we do not have another processor on the board to do this. I was wondering if I could map 0xFF80 to EXTERNAL memory and still have it work. The memory map lists the program section between 0x8000 and 0xFFFF as On-Chip SARAM 2 *and* External (EMIF). But it's not clear how I choose which. It looks like if I set EMIF mode (XIO=1, MP/MC = 1), it will be external. However, it appears that doing this will make ALL of program space map to external memory, so I would have nowhere to put the code I was booting! Ideally, I'd like to be able to move the code to SARAM3 and SARAM4. Brian bessette <> wrote: original article:http://www.egroups.com/group/c54x/?startc > At 04:14 PM 10/26/99 -0700, you wrote: > >We are using a C5420 in our design. I cannot figure out how to boot > >the > >processor, since it does not have a bootloader in internal ROM. I am > >trying > >to figure a way to map the reset vector at 0xFF80 to external memory > >(an > >EEPROM) at reset, but the documentation is ambiguous. Is what I am > >trying to > >do possible? > > > > > >Thanks, > >Brian Marinari > > > > > > The reset vector on the C54x need a branch instruction. Put a branch > instruction (to the address of your boot routine) at address 0xFF80 like this: > > .sect 0FF80h > B _c_int00 ;initial boot routine address (_c_int00 is > defined in T.I.'s RTS.SRC library) > Bruno Bessette, ing. > Universit |
|
de Sherbrooke > EMAIL: > TEL: (819) 821-8000 ext: 1937 > FAX: (819) 821-7937 > |
