hai friends,
my name is vishnu. i have been working with C5502 for some
time for my current project. coding is done in CCS2. in our DSP board
an SDRAM is also connected. i have to configure the SDRAM. i have
tried so many ways but i am not able configure the SDRAM correctly.
the sdram used is MT48LC2M32B2.. it is a 512K*32*4 bank SDRAM. I have
been using csl library.. but i am not able to get it to work.
can anyone help me?? please give a comment on this problem??
have any of u friends have any sample code on interfacing and
configuring SDRAM with c5502.
thanks in advance
vishnu prasad
interfacing SDRAM with c5502
Started by ●December 19, 2006
Reply by ●December 19, 20062006-12-19
Vishnu-
> my name is vishnu. i have been working with C5502 for some
> time for my current project. coding is done in CCS2. in our DSP board
> an SDRAM is also connected. i have to configure the SDRAM. i have
> tried so many ways but i am not able configure the SDRAM correctly.
> the sdram used is MT48LC2M32B2.. it is a 512K*32*4 bank SDRAM. I have
> been using csl library.. but i am not able to get it to work.
> can anyone help me?? please give a comment on this problem??
What CEn space are you using? Is this an in-house board or DSK board? If it's an
in-house board, have you got other external memory to work yet, for example Flash or
SRAM? What settings are you using for GBLCTL1, GBLCTL2, and SDCTL registers?
What about CESCR register? Since your SDRAM will take 8 Mbyte, then only CE0 and CE2
can be active, and you must set CESCR accordingly. Did you do that?
> have any of u friends have any sample code on interfacing and
> configuring SDRAM with c5502.
Sure but it probably doesn't match your board. To solve your problem, you need
thorough understanding of the board and 5502 setup so you can find the specific thing
that makes a difference.
-Jeff
> my name is vishnu. i have been working with C5502 for some
> time for my current project. coding is done in CCS2. in our DSP board
> an SDRAM is also connected. i have to configure the SDRAM. i have
> tried so many ways but i am not able configure the SDRAM correctly.
> the sdram used is MT48LC2M32B2.. it is a 512K*32*4 bank SDRAM. I have
> been using csl library.. but i am not able to get it to work.
> can anyone help me?? please give a comment on this problem??
What CEn space are you using? Is this an in-house board or DSK board? If it's an
in-house board, have you got other external memory to work yet, for example Flash or
SRAM? What settings are you using for GBLCTL1, GBLCTL2, and SDCTL registers?
What about CESCR register? Since your SDRAM will take 8 Mbyte, then only CE0 and CE2
can be active, and you must set CESCR accordingly. Did you do that?
> have any of u friends have any sample code on interfacing and
> configuring SDRAM with c5502.
Sure but it probably doesn't match your board. To solve your problem, you need
thorough understanding of the board and 5502 setup so you can find the specific thing
that makes a difference.
-Jeff
Reply by ●December 20, 20062006-12-20
Vishnu-
> thanx jeff for replying to my query...
> i am currently working on an inhouse board of c5502.
> the chip select for SDRAM is connected to CE0 space.
> the other spaces are now connected with an ADC to CE1,
> a UART to CE2 and another IC to CE3..
Ok but for 5502 that's not going to work with 64 Mbit SDRAM. With that size SDRAM
you can only use CE0 and CE2. Please double-check the 5501/5502 EMIF reference guide
doc:
http://focus.ti.com/lit/ug/spru621f/spru621f.pdf
If you need additional CEn, then your SDRAM size has to be smaller -- this is a
design weakness in 55xx series. You should try another size or configuration of
SDRAM. You should be able to find pin-compatible SDRAM packages with which to
experiment. This becomes even more of an issue if you need to boot from Flash: the
5502 bootloader requires Flash in CE1 space.
-Jeff
> i have given the following values for the emif registers
>
> 1) GBLCTL1 = 0x207C
> 2) GBLCTL2 = 0x0000
> 3) CE0_CTL1 = 0xC430
> 4) CE0_CTL2 = 0x7107
> 5) CEO_SCR1 = 0x0000
> 6) CEO_SCR1 = RESERVED
> 7) SDCTL1 = 0xF000
> 8) SDCTL2 = 0x4577
> 9) SDRFR1 = 0x5DC
> 10) SDRFR2 = 0x0200
> 11) SDEXT1 = 0x5F3F
> 12) SDEXT2 = 0x0017
> These are the values i have given for configuring SDRAM.. hav i done
> anythin wrong..
> will you please give me a comment on the procedure to follow to configure SDRAM.
>
> thanks in advance
> vishnu prasad
>
> ----- Original Message ----
> From: Jeff Brower
> To: Vishnu Prasad
> Cc: c...
> Sent: Tuesday, December 19, 2006 11:02:20 PM
> Subject: Re: [c55x] interfacing SDRAM with c5502
> Vishnu-
>
> > my name is vishnu. i have been working with C5502 for some
> > time for my current project. coding is done in CCS2. in our DSP board
> > an SDRAM is also connected. i have to configure the SDRAM. i have
> > tried so many ways but i am not able configure the SDRAM correctly.
> > the sdram used is MT48LC2M32B2.. it is a 512K*32*4 bank SDRAM. I have
> > been using csl library.. but i am not able to get it to work.
> > can anyone help me?? please give a comment on this problem??
>
> What CEn space are you using? Is this an in-house board or DSK board? If it's an
> in-house board, have you got other external memory to work yet, for example Flash
> or
> SRAM? What settings are you using for GBLCTL1, GBLCTL2, and SDCTL registers?
>
> What about CESCR register? Since your SDRAM will take 8 Mbyte, then only CE0 and
> CE2
> can be active, and you must set CESCR accordingly. Did you do that?
>
> > have any of u friends have any sample code on interfacing and
> > configuring SDRAM with c5502.
>
> Sure but it probably doesn't match your board. To solve your problem, you need
> thorough understanding of the board and 5502 setup so you can find the specific
> thing
> that makes a difference.
>
> -Jeff
>
> thanx jeff for replying to my query...
> i am currently working on an inhouse board of c5502.
> the chip select for SDRAM is connected to CE0 space.
> the other spaces are now connected with an ADC to CE1,
> a UART to CE2 and another IC to CE3..
Ok but for 5502 that's not going to work with 64 Mbit SDRAM. With that size SDRAM
you can only use CE0 and CE2. Please double-check the 5501/5502 EMIF reference guide
doc:
http://focus.ti.com/lit/ug/spru621f/spru621f.pdf
If you need additional CEn, then your SDRAM size has to be smaller -- this is a
design weakness in 55xx series. You should try another size or configuration of
SDRAM. You should be able to find pin-compatible SDRAM packages with which to
experiment. This becomes even more of an issue if you need to boot from Flash: the
5502 bootloader requires Flash in CE1 space.
-Jeff
> i have given the following values for the emif registers
>
> 1) GBLCTL1 = 0x207C
> 2) GBLCTL2 = 0x0000
> 3) CE0_CTL1 = 0xC430
> 4) CE0_CTL2 = 0x7107
> 5) CEO_SCR1 = 0x0000
> 6) CEO_SCR1 = RESERVED
> 7) SDCTL1 = 0xF000
> 8) SDCTL2 = 0x4577
> 9) SDRFR1 = 0x5DC
> 10) SDRFR2 = 0x0200
> 11) SDEXT1 = 0x5F3F
> 12) SDEXT2 = 0x0017
> These are the values i have given for configuring SDRAM.. hav i done
> anythin wrong..
> will you please give me a comment on the procedure to follow to configure SDRAM.
>
> thanks in advance
> vishnu prasad
>
> ----- Original Message ----
> From: Jeff Brower
> To: Vishnu Prasad
> Cc: c...
> Sent: Tuesday, December 19, 2006 11:02:20 PM
> Subject: Re: [c55x] interfacing SDRAM with c5502
> Vishnu-
>
> > my name is vishnu. i have been working with C5502 for some
> > time for my current project. coding is done in CCS2. in our DSP board
> > an SDRAM is also connected. i have to configure the SDRAM. i have
> > tried so many ways but i am not able configure the SDRAM correctly.
> > the sdram used is MT48LC2M32B2.. it is a 512K*32*4 bank SDRAM. I have
> > been using csl library.. but i am not able to get it to work.
> > can anyone help me?? please give a comment on this problem??
>
> What CEn space are you using? Is this an in-house board or DSK board? If it's an
> in-house board, have you got other external memory to work yet, for example Flash
> or
> SRAM? What settings are you using for GBLCTL1, GBLCTL2, and SDCTL registers?
>
> What about CESCR register? Since your SDRAM will take 8 Mbyte, then only CE0 and
> CE2
> can be active, and you must set CESCR accordingly. Did you do that?
>
> > have any of u friends have any sample code on interfacing and
> > configuring SDRAM with c5502.
>
> Sure but it probably doesn't match your board. To solve your problem, you need
> thorough understanding of the board and 5502 setup so you can find the specific
> thing
> that makes a difference.
>
> -Jeff
>
