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Hey folks! Wondering if anyone has any experience here... The datasheets for the 6211/6711 have this footnote in them on the Memory Map Summary: "The number of EMIF address pins (EA[21:2]) limits the maximum addressable memory (SDRAM) to 128MB per CE space. To get 256MB of addressable memory, additional general-purpose output pin or external logic is required." This makes sense (why oh why couldn't they have just added another couple pins?) however I'm wondering about the possible implementations of this. If an additional GPIO pin or similar would be implemented to help address more memory, wouldn't all memory accesses to the CE space have to be 'manually' addressed by the program every step of the way? In other words, would I have to be entirely conscious of EVERY memory access into the CE space, or is there any place (perhaps in DSP/BIOS?) that memory accesses could essentially be 'trapped' in order to switch the additional address pin on and off as needed? Or maybe a better question... Is there way to use external logic to generate this control automatically without having to create a full-blown SDRAM controller in FPGA? I'm just drawing a blank here on an 'external logic' approach. . . From the top down design approach, what I'd ideally love to be able to do is to use a piece of standard 168-pin SDRAM DIMM memory as a large convenient block of storage for the DSP, but at the moment I'd really be limited to a single-sided DIMM (two CE spaces available on the DIMM) with the maximum addressable being 128MB per space, yielding a total of 256MB possible. Any ideas on how I may be able to finagle another 256MB of out the memory addressing, possibly even generating two other pseudo-CE enable lines to allow a full double-sided DIMM to be used for a total of 512MB of SDRAM? Any ideas are certainly welcome!! I've been pondering this for a week or two now but still lack any brilliant epiphanies on the subject for an eloquent solution. I'd love to go C64x and simply use the 64-bit bus and oodles of spare CE spaces, but alas, it's not an option at the moment. Thanks in advance for any insight you may have!! Best regards, -- Matt |
The Full Monty - Accessing 256MB of SDRAM per CE space on 6x11?
Started by ●September 14, 2002
