Interrupt initialization question 6727

Group, sorry for the elementary question:

I am trying to set up my board to generate an interrupt from the
UHPI_HAS input pin on the C6727 DSP.
Setting up the UHPI registers seems strait forward as outlined in the
UHPI ref document. (spru719.pdf)

*(Uint32)GPIOEN = 0x00000004; // configure UHPI_HAS pin as a GPIO
pin
*(Uint32)GPIODIR2 = 0x00000000; // UHPI_HAS pin is input
*(Uint32)GPIOINT = 0x00000004; // enable rising edge of the UHPI_HAS
pin to generate a INT6 DSP

I have also read that Code Composer uses the interrupt key word to
define ISRs in C as shown below:

interrupt void int_handler()
{
// do your ISR stuff here
}

My question is how do I map the DSP INT6 to my ISR and how do I enable
and disable interrupts?

Any help would be appriciated - if there is a document out there
explaining or showing examples on what I need to do please let me know.

Sincerely,

David Tate
d...@lmco.com Start a New Thread

David,

On 5/5/08, Tate, David wrote:
>
> Group, sorry for the elementary question:
>
> I am trying to set up my board to generate an interrupt from the UHPI_HAS
> input pin on the C6727 DSP.
> Setting up the UHPI registers seems strait forward as outlined in the UHPI
> ref document. (spru719.pdf)
>
> *(Uint32)GPIOEN = 0x00000004; // configure UHPI_HAS pin as a GPIO pin
> *(Uint32)GPIODIR2 = 0x00000000; // UHPI_HAS pin is input
> *(Uint32)GPIOINT = 0x00000004; // enable rising edge of the UHPI_HAS
> pin to generate a INT6 DSP
>
> I have also read that Code Composer uses the interrupt key word to define
> ISRs in C as shown below:
>
> interrupt void int_handler()
> {
> // do your ISR stuff here
> }
>
> My question is how do I map the DSP INT6 to my ISR and how do I enable and
> disable interrupts?
>

You should check out the interrupt chapter in spru189 [there may be a newer
doc for c672x, but this one is installed with CCS]. You should be able to
find a sample vector table under the 'examples' directory of CCS. Search
for 'vectors.asm'.

1. Make sure that your interrupt table is in RAM, not ROM.
2. Put a branch to your ISR in int slot 6 of the table.
3. GIE enables/disables global interrupts.

mikedunn

Any help would be appriciated - if there is a document out there
> explaining or showing examples on what I need to do please let me know.
>
> Sincerely,
>
> David Tate
> d...@lmco.com
>

--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php Start a New Thread

David,

to map the interrupt.
There is the interrupt vector table.
This interrupt vector table can be located at several different places depending on the mode of
operation of the processor at power-up.

The specific interrupt in question is vectored to a specific location in the interrupt vector table
(off hand, I do not know which position for this specific interrupt).
The interrupt vector table contains a long jump to the interrupt handler routine.
The interrupt handler routine must (near its' end) reset the interrupt pending flag for the specific
interrupt (the location of this bit flag varies for each interrupt and between different CPUs.)

To enable interrupts, there is a global interrupt enable flag bit.

There is a interrupt enable bit for each individual interrupt.

again, at the end of the interrupt, the appropriate interrupt pending bit has to be cleared (usually
on the TI DSPs by writing '1' to the appropriate bit.

If the interrupt pending bit is not cleared during the processing of the interrupt handler, then
when the interrupt handler exits, the interrupt will immediately occur again.

Also, for grouped interrupts, if more than one interrupt source is pending within those same
interrupt pending bits then the bits need to be scaned again.

Also, when interrupts are grouped, then there will be a interrupt pending bit for the group that
also needs to be cleared before exiting the interrupt handler.

for the CAN bus interface module, there is only two interrupt vectors, but there are MANY details
that can cause the interrupt to occur, so all the possible CAN interrupt sources have to be scanned
when a CAN interrupt (high or low priority) is asserted.

There are examples on-line of how to setup and handle interrupts. I would suggest googleing for them.

R. Williams

---------- Original Message -----------
From: "Tate, David"
To: c...
Sent: Mon, 05 May 2008 18:02:18 -0500
Subject: [c6x] Interrupt initialization question 6727

> Group, sorry for the elementary question:
>
> I am trying to set up my board to generate an interrupt from the
> UHPI_HAS input pin on the C6727 DSP.
> Setting up the UHPI registers seems strait forward as outlined in the
> UHPI ref document. (spru719.pdf)
>
> *(Uint32)GPIOEN = 0x00000004; // configure UHPI_HAS pin as a GPIO
> pin
> *(Uint32)GPIODIR2 = 0x00000000; // UHPI_HAS pin is input
> *(Uint32)GPIOINT = 0x00000004; // enable rising edge of the UHPI_HAS
> pin to generate a INT6 DSP
>
> I have also read that Code Composer uses the interrupt key word to
> define ISRs in C as shown below:
>
> interrupt void int_handler()
> {
> // do your ISR stuff here
> }
>
> My question is how do I map the DSP INT6 to my ISR and how do I enable
> and disable interrupts?
>
> Any help would be appriciated - if there is a document out there
> explaining or showing examples on what I need to do please let me know.
>
> Sincerely,
>
> David Tate
> d...@lmco.com
------- End of Original Message ------- Start a New Thread