Hi,
Anybody succeeded booting c6727 from SPI host (in SPI slave mode) ?
According to spraa69c there are 3 phases :
1. SWS
2. POS
3. OS
I'm using ARM board, wich has SPI connected to DSP and RS232 connected
to Linux PC, so all data is logged. I see that SWS is passed but POS
is stucked in N number sending/receiving. So the log:
...............................................
>r
Resetting DSP ... done
// Start SWS
>s 0x5853 // send XMT_START
spi response of 0x5853 - 0xdf9e
>s 0x5853
spi response of 0x5853 - 0x5253 // got RECV_START, switch to POS phase
>s 0x5853 // send PING_DEVICE
msb
spi response of 0x5853 - 0x5253
>s 0x590b // send PING_DEVICE
lsb
spi response of 0x590b - 0x5253 // hmm, DSP still in SWS ?!
>s 0x5853 // ok, send PING_DEVICE
again ;(
spi response of 0x5853 - 0x5253
>s 0x590b
spi response of 0x590b - 0x590b // finally got RECV_PING_DEVICE, send
N
>s 0xa
spi response of 0xa - 0x5253 // Oops, pdf says that 0xa must be
returned !?
....................................................
What is wrong with this protocol ?
Is there any 16 bit SPI slave boot mode examples available from TI ?
Pdf has only 32 bit flash examples.
It is very starnge that bootloader developers did not implemented
error codes - how the host can know the error reason ? Bootloder
silently loops on error, waiting for SWS.
Is there bootloader source code available to help investigate the
problem further ?
P.S. I'm using rev1.2 device, seems like this is not
last-bit-hold-time described in errata.
Thanks in advance
