We made a custom DSP board using C6713B. The board has only two active parts:
Flash and DSP itself. When the board is powered up, secondary boot fails some
times. It happens less than 30% of times it boots. When secondary boot passes,
system works fine. Can any one suggest any way to debug the problem.
Thanks
Sankar
_____________________________________
Secondary booting failure
Started by ●March 16, 2009
Reply by ●March 16, 20092009-03-16
Sankar-
> We made a custom DSP board using C6713B. The board has only
> two active parts: Flash and DSP itself. When the board is
> powered up, secondary boot fails some times. It happens less
> than 30% of times it boots. When secondary boot passes,
> system works fine. Can any one suggest any way to debug the
> problem.
Is the Flash connected to EMIF? If so then suggest you use JTAG to verify Flash interface / timing. You can write a
test program that first reads basic Flash registers like chip ID, then does 1000s of sector erase, write, read, etc.
This would verify your EMIF register settings, ARDY timing, DSP boot config, etc.
Also what is your PLL setting on boot-up? You can measure CLKOUT4 or other pin. Maybe the DSP is not running at the
speed you think...
-Jeff
_____________________________________
> We made a custom DSP board using C6713B. The board has only
> two active parts: Flash and DSP itself. When the board is
> powered up, secondary boot fails some times. It happens less
> than 30% of times it boots. When secondary boot passes,
> system works fine. Can any one suggest any way to debug the
> problem.
Is the Flash connected to EMIF? If so then suggest you use JTAG to verify Flash interface / timing. You can write a
test program that first reads basic Flash registers like chip ID, then does 1000s of sector erase, write, read, etc.
This would verify your EMIF register settings, ARDY timing, DSP boot config, etc.
Also what is your PLL setting on boot-up? You can measure CLKOUT4 or other pin. Maybe the DSP is not running at the
speed you think...
-Jeff
_____________________________________
Reply by ●March 17, 20092009-03-17
Sankar,
On Mon, Mar 16, 2009 at 6:37 PM, Jeff Brower wrote:
> Sankar-
>
>> We made a custom DSP board using C6713B. The board has only
>> two active parts: Flash and DSP itself. When the board is
>> powered up, secondary boot fails some times. It happens less
>> than 30% of times it boots. When secondary boot passes,
>> system works fine. Can any one suggest any way to debug the
>> problem.
>
> Is the Flash connected to EMIF? If so then suggest you use JTAG to verify
> Flash interface / timing. You can write a
> test program that first reads basic Flash registers like chip ID, then does
> 1000s of sector erase, write, read, etc.
> This would verify your EMIF register settings, ARDY timing, DSP boot config,
> etc.
>
> Also what is your PLL setting on boot-up? You can measure CLKOUT4 or other
> pin. Maybe the DSP is not running at the
> speed you think...
If everything looks okay after following Jeff's suggestions you might
try the following.
1. If possible, configure for HPI boot.
2. Load the primary boot loader with CCS.
3. Run the code.
4. Do a CCS disconnect.
5. Remove and reapply target power.
6. Return to step 2 and repeat the test several times.
Did you get the same failure rate??
If yes, you will need to troubleshoot your secondary loader.
If you get no failures, you will need to troubleshoot the primary boot
loader or reset circuitry.
The above conclusions assume that Jeff's suggestions have been followed.
mikedunn
>
> -Jeff
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
_____________________________________
On Mon, Mar 16, 2009 at 6:37 PM, Jeff Brower wrote:
> Sankar-
>
>> We made a custom DSP board using C6713B. The board has only
>> two active parts: Flash and DSP itself. When the board is
>> powered up, secondary boot fails some times. It happens less
>> than 30% of times it boots. When secondary boot passes,
>> system works fine. Can any one suggest any way to debug the
>> problem.
>
> Is the Flash connected to EMIF? If so then suggest you use JTAG to verify
> Flash interface / timing. You can write a
> test program that first reads basic Flash registers like chip ID, then does
> 1000s of sector erase, write, read, etc.
> This would verify your EMIF register settings, ARDY timing, DSP boot config,
> etc.
>
> Also what is your PLL setting on boot-up? You can measure CLKOUT4 or other
> pin. Maybe the DSP is not running at the
> speed you think...
If everything looks okay after following Jeff's suggestions you might
try the following.
1. If possible, configure for HPI boot.
2. Load the primary boot loader with CCS.
3. Run the code.
4. Do a CCS disconnect.
5. Remove and reapply target power.
6. Return to step 2 and repeat the test several times.
Did you get the same failure rate??
If yes, you will need to troubleshoot your secondary loader.
If you get no failures, you will need to troubleshoot the primary boot
loader or reset circuitry.
The above conclusions assume that Jeff's suggestions have been followed.
mikedunn
>
> -Jeff
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
_____________________________________
Reply by ●March 18, 20092009-03-18
Thanks Jeff and Mike,
I made sure primary and secondary bootloader work. The way i did is that i used DSK board to emulate the boot process from External RAM. It works fine.
However the difference between DSK and my custom board I can see is the RESET circit. We used a small uC to do power management for the DSP. The uC also is used for reset circuit. please note that we need to use a 5v to 3.3 volt level translator for the reset pin.
I notiched that if i allow enough time ( couple to minites) between consequtive power ups, booting process works fine. However, if i unplug and then plug the power quickly, most of the time boot fails.
I just wanted to make it sure the following statement is right:
EVERY TIME EXTERNAL RESET PIN ASSERTED LOW, BOOT PROCESS SHOULD BEGIN.
Please reply if i am wrong.
Sankar
We made a custom DSP board using C6713B. The board has only two active parts: Flash and DSP itself. When the board is powered up, secondary boot fails some times. It happens less than 30% of times it boots. When secondary boot passes, system works fine. Can any one suggest any way to debug the problem.
>
>Thanks
>
>Sankar
>
>_____________________________________
_____________________________________
I made sure primary and secondary bootloader work. The way i did is that i used DSK board to emulate the boot process from External RAM. It works fine.
However the difference between DSK and my custom board I can see is the RESET circit. We used a small uC to do power management for the DSP. The uC also is used for reset circuit. please note that we need to use a 5v to 3.3 volt level translator for the reset pin.
I notiched that if i allow enough time ( couple to minites) between consequtive power ups, booting process works fine. However, if i unplug and then plug the power quickly, most of the time boot fails.
I just wanted to make it sure the following statement is right:
EVERY TIME EXTERNAL RESET PIN ASSERTED LOW, BOOT PROCESS SHOULD BEGIN.
Please reply if i am wrong.
Sankar
We made a custom DSP board using C6713B. The board has only two active parts: Flash and DSP itself. When the board is powered up, secondary boot fails some times. It happens less than 30% of times it boots. When secondary boot passes, system works fine. Can any one suggest any way to debug the problem.
>
>Thanks
>
>Sankar
>
>_____________________________________
_____________________________________
Reply by ●March 18, 20092009-03-18
Yes your statement is right. Everytime it gose to reset by reset pin ,boot
will take place ,as it is the first thing which wil be done after fetching
the config pin HD 3/4 . And when it fetches for flash boot it will load the
first few byte ( 1k in 6713 ) into internal ram. The problem seems in reset
ckt. A reset should come after some time. However a couple a min means
there is some capacitors which are not discharged properly during reset and
due to which a reset dose not occur.
On Wed, Mar 18, 2009 at 2:45 AM, wrote:
> Thanks Jeff and Mike,
>
> I made sure primary and secondary bootloader work. The way i did is that i
> used DSK board to emulate the boot process from External RAM. It works fine.
>
> However the difference between DSK and my custom board I can see is the
> RESET circit. We used a small uC to do power management for the DSP. The uC
> also is used for reset circuit. please note that we need to use a 5v to 3.3
> volt level translator for the reset pin.
>
> I notiched that if i allow enough time ( couple to minites) between
> consequtive power ups, booting process works fine. However, if i unplug and
> then plug the power quickly, most of the time boot fails.
>
> I just wanted to make it sure the following statement is right:
>
> EVERY TIME EXTERNAL RESET PIN ASSERTED LOW, BOOT PROCESS SHOULD BEGIN.
>
> Please reply if i am wrong.
>
> Sankar
>
> We made a custom DSP board using C6713B. The board has only two active
> parts: Flash and DSP itself. When the board is powered up, secondary boot
> fails some times. It happens less than 30% of times it boots. When secondary
> boot passes, system works fine. Can any one suggest any way to debug the
> problem.
> >
> >Thanks
> >
> >Sankar
> >
> >_____________________________________
> >
>
_____________________________________
will take place ,as it is the first thing which wil be done after fetching
the config pin HD 3/4 . And when it fetches for flash boot it will load the
first few byte ( 1k in 6713 ) into internal ram. The problem seems in reset
ckt. A reset should come after some time. However a couple a min means
there is some capacitors which are not discharged properly during reset and
due to which a reset dose not occur.
On Wed, Mar 18, 2009 at 2:45 AM, wrote:
> Thanks Jeff and Mike,
>
> I made sure primary and secondary bootloader work. The way i did is that i
> used DSK board to emulate the boot process from External RAM. It works fine.
>
> However the difference between DSK and my custom board I can see is the
> RESET circit. We used a small uC to do power management for the DSP. The uC
> also is used for reset circuit. please note that we need to use a 5v to 3.3
> volt level translator for the reset pin.
>
> I notiched that if i allow enough time ( couple to minites) between
> consequtive power ups, booting process works fine. However, if i unplug and
> then plug the power quickly, most of the time boot fails.
>
> I just wanted to make it sure the following statement is right:
>
> EVERY TIME EXTERNAL RESET PIN ASSERTED LOW, BOOT PROCESS SHOULD BEGIN.
>
> Please reply if i am wrong.
>
> Sankar
>
> We made a custom DSP board using C6713B. The board has only two active
> parts: Flash and DSP itself. When the board is powered up, secondary boot
> fails some times. It happens less than 30% of times it boots. When secondary
> boot passes, system works fine. Can any one suggest any way to debug the
> problem.
> >
> >Thanks
> >
> >Sankar
> >
> >_____________________________________
> >
>
_____________________________________
Reply by ●March 20, 20092009-03-20
Sankar-
> Thanks Jeff and Mike,
>
> I made sure primary and secondary bootloader work. The way i did is that
> i used DSK board to emulate the boot process from External RAM. It works
> fine.
>
> However the difference between DSK and my custom board I can see is the
> RESET circit. We used a small uC to do power management for the DSP. The
> uC also is used for reset circuit. please note that we need to use a 5v
> to 3.3 volt level translator for the reset pin.
>
> I notiched that if i allow enough time ( couple to minites) between
> consequtive power ups, booting process works fine. However, if i unplug
> and then plug the power quickly, most of the time boot fails.
>
> I just wanted to make it sure the following statement is right:
>
> EVERY TIME EXTERNAL RESET PIN ASSERTED LOW, BOOT PROCESS SHOULD BEGIN.
>
> Please reply if i am wrong.
Yes every time Reset goes low, no matter what the current level of Reset of state of
the DSP, a new Reset sequence should begin -- but that assumes Vcc Core and Vcc IO
are above nominal levels...
One guess is that because your board has minimal devices (evidently just DSP + Flash
+ misc), it's relatively easy for your decoupling caps to "hold up" voltage after
power-off. It may take time for your uC power management chip to react, especially
since you seem to have wired it to 5V instead of 3.3V (why did you do that?) You
should put a scope on 3.3V and Vcc Core and measure these things:
-how long it takes for the rails to go to Gnd
after power-off?
-what are the relative levels of 3.3V and Vcc
Core when you turn power-on and you get a
failure?
The last item could be important if the C6713 has Vcc core / Vcc IO sequencing
requirements. You can check the data sheet and errata for this issue -- some TI DSPs
are "more affected" by this than others. In the old days some TI DSPs had very
strict requirements, but less so over time. I would put the C6713 in the "almost
old" category.
You should scope your power management chip Reset output also. Is it not issuing a
Reset until some time after power-off because 5V hasn't dropped enough?
-Jeff
> Sankar
>
> We made a custom DSP board using C6713B. The board has only two active parts: Flash and DSP itself. When the board is powered up, secondary boot fails some times. It happens less than 30% of times it boots. When secondary boot passes, system works fine. Can any one suggest any way to debug the problem.
> >
> >Thanks
> >
> >Sankar
_____________________________________
> Thanks Jeff and Mike,
>
> I made sure primary and secondary bootloader work. The way i did is that
> i used DSK board to emulate the boot process from External RAM. It works
> fine.
>
> However the difference between DSK and my custom board I can see is the
> RESET circit. We used a small uC to do power management for the DSP. The
> uC also is used for reset circuit. please note that we need to use a 5v
> to 3.3 volt level translator for the reset pin.
>
> I notiched that if i allow enough time ( couple to minites) between
> consequtive power ups, booting process works fine. However, if i unplug
> and then plug the power quickly, most of the time boot fails.
>
> I just wanted to make it sure the following statement is right:
>
> EVERY TIME EXTERNAL RESET PIN ASSERTED LOW, BOOT PROCESS SHOULD BEGIN.
>
> Please reply if i am wrong.
Yes every time Reset goes low, no matter what the current level of Reset of state of
the DSP, a new Reset sequence should begin -- but that assumes Vcc Core and Vcc IO
are above nominal levels...
One guess is that because your board has minimal devices (evidently just DSP + Flash
+ misc), it's relatively easy for your decoupling caps to "hold up" voltage after
power-off. It may take time for your uC power management chip to react, especially
since you seem to have wired it to 5V instead of 3.3V (why did you do that?) You
should put a scope on 3.3V and Vcc Core and measure these things:
-how long it takes for the rails to go to Gnd
after power-off?
-what are the relative levels of 3.3V and Vcc
Core when you turn power-on and you get a
failure?
The last item could be important if the C6713 has Vcc core / Vcc IO sequencing
requirements. You can check the data sheet and errata for this issue -- some TI DSPs
are "more affected" by this than others. In the old days some TI DSPs had very
strict requirements, but less so over time. I would put the C6713 in the "almost
old" category.
You should scope your power management chip Reset output also. Is it not issuing a
Reset until some time after power-off because 5V hasn't dropped enough?
-Jeff
> Sankar
>
> We made a custom DSP board using C6713B. The board has only two active parts: Flash and DSP itself. When the board is powered up, secondary boot fails some times. It happens less than 30% of times it boots. When secondary boot passes, system works fine. Can any one suggest any way to debug the problem.
> >
> >Thanks
> >
> >Sankar
_____________________________________
Reply by ●April 5, 20092009-04-05
sankabarua,
From your description, it sounds like the boot mode pins are not being held in
the correct state for quite long enough after the reset* signal is being released.
R. Williams
---------- Original Message -----------
From: s...@hotmail.com
To: c...
Sent: Mon, 16 Mar 2009 17:29:07 -0400
Subject: [c6x] Secondary booting failure
> We made a custom DSP board using C6713B. The board has only two active
> parts: Flash and DSP itself. When the board is powered up, secondary
> boot fails some times. It happens less than 30% of times it boots.
> When secondary boot passes, system works fine. Can any one suggest any
> way to debug the problem.
>
> Thanks
>
> Sankar
------- End of Original Message -------
_____________________________________
From your description, it sounds like the boot mode pins are not being held in
the correct state for quite long enough after the reset* signal is being released.
R. Williams
---------- Original Message -----------
From: s...@hotmail.com
To: c...
Sent: Mon, 16 Mar 2009 17:29:07 -0400
Subject: [c6x] Secondary booting failure
> We made a custom DSP board using C6713B. The board has only two active
> parts: Flash and DSP itself. When the board is powered up, secondary
> boot fails some times. It happens less than 30% of times it boots.
> When secondary boot passes, system works fine. Can any one suggest any
> way to debug the problem.
>
> Thanks
>
> Sankar
------- End of Original Message -------
_____________________________________
