Hi,
i am programming an application for TI DM6437 DSP and I like to use the watchdog
for two purposes:
1. The bootloader loads the application, activates the watchdog and starts the
application. If the application image is broken and does not start correctly
(say after 10 seconds), then the watchdog resets the DSP and the bootloader can
start a recovery application.
2. If the application starts correctly, it re-initializes the watchdog. Then, a
timeout should occure already after 4 seconds.
What is not working by now is this re-initialization. Starting the watchdog for
the first time after power on forks fine. But if I try it the second time, I
cannot set the WDEN-flag in TGCR register.
This is my sequence for re-init:
CFG_TIMERCTL &= ~1 // prevent DSP reset
if (TIMER2_WDTCR & WDTCR_WDEN) {
TIMER2_WDTCR = 0; // force timeout by writing wrong key
TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
}
CFG_TIMERCTL |= 1 // enebale DSP reset
// init TGCR and PRD registers
TIMER2_WDTCR = WDTCR_WDEN;
// write correct keys to WDTCR
What I see is, that forcing timeout and clearing the timeout flag works as
expected. TGCR is then '0'. But setting the WDEN flag has no effect,
the TGCR register stays '0'.
Do I forget something or is such a re-init not possible at all? Thanks for your
help.
Tobias
_____________________________________
Reinitialize Watchdog of DM6437
Started by ●December 2, 2009
Reply by ●December 2, 20092009-12-02
Tobias-
> i am programming an application for TI DM6437 DSP and I like to
> use the watchdog for two purposes:
>
> 1. The bootloader loads the application, activates the watchdog
> and starts the application. If the application image
> is broken and does not start correctly (say after 10 seconds),
> then the watchdog resets the DSP and the bootloader can
> start a recovery application.
>
> 2. If the application starts correctly, it re-initializes the
> watchdog. Then, a timeout should occure already after 4
> seconds.
Can you clarify this? Do you mean that after, say 4 sec, you try the re-init, expecting a time-out to occur
immediately? Or, do you mean you wait, say 1 sec, then do the re-init, then expect a time-out to occur a few sec
later?
-Jeff
> What is not working by now is this re-initialization. Starting
> the watchdog for the first time after power on forks
> fine. But if I try it the second time, I cannot set the
> WDEN-flag in TGCR register.
>
> This is my sequence for re-init:
>
> CFG_TIMERCTL &= ~1 // prevent DSP reset
> if (TIMER2_WDTCR & WDTCR_WDEN) {
> TIMER2_WDTCR = 0; // force timeout by writing wrong key
> TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> }
> CFG_TIMERCTL |= 1 // enebale DSP reset
>
> // init TGCR and PRD registers
> TIMER2_WDTCR = WDTCR_WDEN;
> // write correct keys to WDTCR
>
> What I see is, that forcing timeout and clearing the timeout flag works as expected. TGCR is then '0'. But setting the
> WDEN flag has no effect, the TGCR register stays '0'.
>
> Do I forget something or is such a re-init not possible at all? Thanks for your help.
>
> Tobias
_____________________________________
> i am programming an application for TI DM6437 DSP and I like to
> use the watchdog for two purposes:
>
> 1. The bootloader loads the application, activates the watchdog
> and starts the application. If the application image
> is broken and does not start correctly (say after 10 seconds),
> then the watchdog resets the DSP and the bootloader can
> start a recovery application.
>
> 2. If the application starts correctly, it re-initializes the
> watchdog. Then, a timeout should occure already after 4
> seconds.
Can you clarify this? Do you mean that after, say 4 sec, you try the re-init, expecting a time-out to occur
immediately? Or, do you mean you wait, say 1 sec, then do the re-init, then expect a time-out to occur a few sec
later?
-Jeff
> What is not working by now is this re-initialization. Starting
> the watchdog for the first time after power on forks
> fine. But if I try it the second time, I cannot set the
> WDEN-flag in TGCR register.
>
> This is my sequence for re-init:
>
> CFG_TIMERCTL &= ~1 // prevent DSP reset
> if (TIMER2_WDTCR & WDTCR_WDEN) {
> TIMER2_WDTCR = 0; // force timeout by writing wrong key
> TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> }
> CFG_TIMERCTL |= 1 // enebale DSP reset
>
> // init TGCR and PRD registers
> TIMER2_WDTCR = WDTCR_WDEN;
> // write correct keys to WDTCR
>
> What I see is, that forcing timeout and clearing the timeout flag works as expected. TGCR is then '0'. But setting the
> WDEN flag has no effect, the TGCR register stays '0'.
>
> Do I forget something or is such a re-init not possible at all? Thanks for your help.
>
> Tobias
_____________________________________
Reply by ●December 2, 20092009-12-02
tobias,
The T.I. document SPRU989.pdf discusses the details of the Timer2/Watchdog for the DM643x series of DSPs.
Of special interest would be section "3.4 Watchdog Timer Register Write Protection"
BTW:
T.I. always provides a set of header files for each DSP that describes each register and each bit field within the register; such that each bit field can be referenced by a 'register name' + '.' + 'bit' + '.' + 'field name'.
for instance: WDCTR.bit.WDKEY
I always make use of such headers, as they greatly simplify the manipulation of the registers and eliminate many of the problems that can occur when using bit masks, etc.
Also, you wrote:
TIMER2_WDTCR = 0; // force timeout by writing wrong key
that should cause an immediate watchdog timeout event
(if the other registers are properly set, which they are not in your code),
then any following statements within that 'if' statement will never be executed
Since the other registers are not properly set, the watchdog reset does not occur.
Do read the section 3.4 of the SPRU989 document for a caveat to my above statement.
R. Williams
---------- Original Message -----------
From: t...@yahoo.de
To: c...
Sent: Wed, 02 Dec 2009 03:43:31 -0500
Subject: [c6x] Reinitialize Watchdog of DM6437
>
>
> Hi,
>
> i am programming an application for TI DM6437 DSP and I like to use the watchdog for two purposes:
>
> 1. The bootloader loads the application, activates the watchdog and starts the application. If the application image is broken and does not start correctly (say after 10 seconds), then the watchdog resets the DSP and the bootloader can start a recovery application.
>
> 2. If the application starts correctly, it re-initializes the watchdog. Then, a timeout should occure already after 4 seconds.
>
> What is not working by now is this re-initialization. Starting the watchdog for the first time after power on forks fine. But if I try it the second time, I cannot set the WDEN-flag in TGCR register.
>
> This is my sequence for re-init:
>
> CFG_TIMERCTL &= ~1 // prevent DSP reset
> if (TIMER2_WDTCR & WDTCR_WDEN) {
> TIMER2_WDTCR = 0; // force timeout by writing wrong key
> TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> }
> CFG_TIMERCTL |= 1 // enebale DSP reset
>
> // init TGCR and PRD registers
> TIMER2_WDTCR = WDTCR_WDEN;
> // write correct keys to WDTCR
>
> What I see is, that forcing timeout and clearing the timeout flag works as expected. TGCR is then '0'. But setting the WDEN flag has no effect, the TGCR register stays '0'.
>
> Do I forget something or is such a re-init not possible at all? Thanks for your help.
>
> Tobias
------- End of Original Message -------
The T.I. document SPRU989.pdf discusses the details of the Timer2/Watchdog for the DM643x series of DSPs.
Of special interest would be section "3.4 Watchdog Timer Register Write Protection"
BTW:
T.I. always provides a set of header files for each DSP that describes each register and each bit field within the register; such that each bit field can be referenced by a 'register name' + '.' + 'bit' + '.' + 'field name'.
for instance: WDCTR.bit.WDKEY
I always make use of such headers, as they greatly simplify the manipulation of the registers and eliminate many of the problems that can occur when using bit masks, etc.
Also, you wrote:
TIMER2_WDTCR = 0; // force timeout by writing wrong key
that should cause an immediate watchdog timeout event
(if the other registers are properly set, which they are not in your code),
then any following statements within that 'if' statement will never be executed
Since the other registers are not properly set, the watchdog reset does not occur.
Do read the section 3.4 of the SPRU989 document for a caveat to my above statement.
R. Williams
---------- Original Message -----------
From: t...@yahoo.de
To: c...
Sent: Wed, 02 Dec 2009 03:43:31 -0500
Subject: [c6x] Reinitialize Watchdog of DM6437
>
>
> Hi,
>
> i am programming an application for TI DM6437 DSP and I like to use the watchdog for two purposes:
>
> 1. The bootloader loads the application, activates the watchdog and starts the application. If the application image is broken and does not start correctly (say after 10 seconds), then the watchdog resets the DSP and the bootloader can start a recovery application.
>
> 2. If the application starts correctly, it re-initializes the watchdog. Then, a timeout should occure already after 4 seconds.
>
> What is not working by now is this re-initialization. Starting the watchdog for the first time after power on forks fine. But if I try it the second time, I cannot set the WDEN-flag in TGCR register.
>
> This is my sequence for re-init:
>
> CFG_TIMERCTL &= ~1 // prevent DSP reset
> if (TIMER2_WDTCR & WDTCR_WDEN) {
> TIMER2_WDTCR = 0; // force timeout by writing wrong key
> TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> }
> CFG_TIMERCTL |= 1 // enebale DSP reset
>
> // init TGCR and PRD registers
> TIMER2_WDTCR = WDTCR_WDEN;
> // write correct keys to WDTCR
>
> What I see is, that forcing timeout and clearing the timeout flag works as expected. TGCR is then '0'. But setting the WDEN flag has no effect, the TGCR register stays '0'.
>
> Do I forget something or is such a re-init not possible at all? Thanks for your help.
>
> Tobias
------- End of Original Message -------
Reply by ●December 2, 20092009-12-02
Hi Tobias,
The spru989.pdf sect. 3.3 on page 20, in the second paragraph from the
beginning of the page states that
"After entering the Timeout state, the Watchdog Timer cannot be enabled again
until a hardware reset occurs."
The diagram (figure 10 on the page 19) halts there, no matter how the timer
got to the timeout state, due to either its period has expired or by software
writes an incorrect WDKEY value to the WDTCR register.
If the reset bit in the system module's SYS_TIMERCTL is cleared the device
wouldn't reset, instead a WDINT event is fired, I just ran a test that went
there (to the ISR) okay after a 1 sec timeout, but this happened only once.
After that I had to cold reset the board, before running the WDT again :)
Instead of changing the period on the fly, you could probably set up a common
(e.g. a weighted arithmetic mean) period for both the init phase and normal run
phase.
Rgds,
Andrew
> Reinitialize Watchdog of DM6437
> Posted by: tobiasneubert
> Date: Wed Dec 2, 2009 5:03 am ((PST))
>
> Hi,
>
> i am programming an application for TI DM6437 DSP and I like to use the
> watchdog for two purposes:
>
> 1. The bootloader loads the application, activates the watchdog and starts
> the application. If the application image is broken and does not start
> correctly (say after 10 seconds), then the watchdog resets the DSP and the
> bootloader can start a recovery application.
>
> 2. If the application starts correctly, it re-initializes the watchdog.
> Then, a timeout should occure already after 4 seconds.
>
> What is not working by now is this re-initialization. Starting the watchdog
> for the first time after power on forks fine. But if I try it the second
> time, I cannot set the WDEN-flag in TGCR register.
>
> This is my sequence for re-init:
>
> CFG_TIMERCTL &= ~1 // prevent DSP reset
> if (TIMER2_WDTCR & WDTCR_WDEN) {
> TIMER2_WDTCR = 0; // force timeout by writing wrong key
> TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> }
> CFG_TIMERCTL |= 1 // enebale DSP reset
>
> // init TGCR and PRD registers
> TIMER2_WDTCR = WDTCR_WDEN;
> // write correct keys to WDTCR
>
> What I see is, that forcing timeout and clearing the timeout flag works as
> expected. TGCR is then '0'. But setting the WDEN flag has no effect, the TGCR
> register stays '0'.
>
> Do I forget something or is such a re-init not possible at all? Thanks for
> your help.
>
> Tobias
>
_____________________________________
The spru989.pdf sect. 3.3 on page 20, in the second paragraph from the
beginning of the page states that
"After entering the Timeout state, the Watchdog Timer cannot be enabled again
until a hardware reset occurs."
The diagram (figure 10 on the page 19) halts there, no matter how the timer
got to the timeout state, due to either its period has expired or by software
writes an incorrect WDKEY value to the WDTCR register.
If the reset bit in the system module's SYS_TIMERCTL is cleared the device
wouldn't reset, instead a WDINT event is fired, I just ran a test that went
there (to the ISR) okay after a 1 sec timeout, but this happened only once.
After that I had to cold reset the board, before running the WDT again :)
Instead of changing the period on the fly, you could probably set up a common
(e.g. a weighted arithmetic mean) period for both the init phase and normal run
phase.
Rgds,
Andrew
> Reinitialize Watchdog of DM6437
> Posted by: tobiasneubert
> Date: Wed Dec 2, 2009 5:03 am ((PST))
>
> Hi,
>
> i am programming an application for TI DM6437 DSP and I like to use the
> watchdog for two purposes:
>
> 1. The bootloader loads the application, activates the watchdog and starts
> the application. If the application image is broken and does not start
> correctly (say after 10 seconds), then the watchdog resets the DSP and the
> bootloader can start a recovery application.
>
> 2. If the application starts correctly, it re-initializes the watchdog.
> Then, a timeout should occure already after 4 seconds.
>
> What is not working by now is this re-initialization. Starting the watchdog
> for the first time after power on forks fine. But if I try it the second
> time, I cannot set the WDEN-flag in TGCR register.
>
> This is my sequence for re-init:
>
> CFG_TIMERCTL &= ~1 // prevent DSP reset
> if (TIMER2_WDTCR & WDTCR_WDEN) {
> TIMER2_WDTCR = 0; // force timeout by writing wrong key
> TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> }
> CFG_TIMERCTL |= 1 // enebale DSP reset
>
> // init TGCR and PRD registers
> TIMER2_WDTCR = WDTCR_WDEN;
> // write correct keys to WDTCR
>
> What I see is, that forcing timeout and clearing the timeout flag works as
> expected. TGCR is then '0'. But setting the WDEN flag has no effect, the TGCR
> register stays '0'.
>
> Do I forget something or is such a re-init not possible at all? Thanks for
> your help.
>
> Tobias
>
_____________________________________
Reply by ●December 3, 20092009-12-03
Jeff-
what I wanted is to initialize the watchdog in the bootloader, start the application and if it starts correctly, the application reinitializes the watchdog within the 10 seconds. I tried forcing a timeout of the watchdog without the need of a DSP reset and reinitializing the watchdog for a shorter timeout of 4 seconds.
But Andrew is rigth, the watchdog can only be re-initialized after a DSP reset. That wasn't clear to me.
Thank you all,
Tobias
--- In c..., "Jeff Brower" wrote:
>
> Tobias-
>
> > i am programming an application for TI DM6437 DSP and I like to
> > use the watchdog for two purposes:
> >
> > 1. The bootloader loads the application, activates the watchdog
> > and starts the application. If the application image
> > is broken and does not start correctly (say after 10 seconds),
> > then the watchdog resets the DSP and the bootloader can
> > start a recovery application.
> >
> > 2. If the application starts correctly, it re-initializes the
> > watchdog. Then, a timeout should occure already after 4
> > seconds.
>
> Can you clarify this? Do you mean that after, say 4 sec, you try the re-init, expecting a time-out to occur
> immediately? Or, do you mean you wait, say 1 sec, then do the re-init, then expect a time-out to occur a few sec
> later?
>
> -Jeff
>
> > What is not working by now is this re-initialization. Starting
> > the watchdog for the first time after power on forks
> > fine. But if I try it the second time, I cannot set the
> > WDEN-flag in TGCR register.
> >
> > This is my sequence for re-init:
> >
> > CFG_TIMERCTL &= ~1 // prevent DSP reset
> > if (TIMER2_WDTCR & WDTCR_WDEN) {
> > TIMER2_WDTCR = 0; // force timeout by writing wrong key
> > TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> > }
> > CFG_TIMERCTL |= 1 // enebale DSP reset
> >
> > // init TGCR and PRD registers
> > TIMER2_WDTCR = WDTCR_WDEN;
> > // write correct keys to WDTCR
> >
> > What I see is, that forcing timeout and clearing the timeout flag works as expected. TGCR is then '0'. But setting the
> > WDEN flag has no effect, the TGCR register stays '0'.
> >
> > Do I forget something or is such a re-init not possible at all? Thanks for your help.
> >
> > Tobias
>
_____________________________________
what I wanted is to initialize the watchdog in the bootloader, start the application and if it starts correctly, the application reinitializes the watchdog within the 10 seconds. I tried forcing a timeout of the watchdog without the need of a DSP reset and reinitializing the watchdog for a shorter timeout of 4 seconds.
But Andrew is rigth, the watchdog can only be re-initialized after a DSP reset. That wasn't clear to me.
Thank you all,
Tobias
--- In c..., "Jeff Brower" wrote:
>
> Tobias-
>
> > i am programming an application for TI DM6437 DSP and I like to
> > use the watchdog for two purposes:
> >
> > 1. The bootloader loads the application, activates the watchdog
> > and starts the application. If the application image
> > is broken and does not start correctly (say after 10 seconds),
> > then the watchdog resets the DSP and the bootloader can
> > start a recovery application.
> >
> > 2. If the application starts correctly, it re-initializes the
> > watchdog. Then, a timeout should occure already after 4
> > seconds.
>
> Can you clarify this? Do you mean that after, say 4 sec, you try the re-init, expecting a time-out to occur
> immediately? Or, do you mean you wait, say 1 sec, then do the re-init, then expect a time-out to occur a few sec
> later?
>
> -Jeff
>
> > What is not working by now is this re-initialization. Starting
> > the watchdog for the first time after power on forks
> > fine. But if I try it the second time, I cannot set the
> > WDEN-flag in TGCR register.
> >
> > This is my sequence for re-init:
> >
> > CFG_TIMERCTL &= ~1 // prevent DSP reset
> > if (TIMER2_WDTCR & WDTCR_WDEN) {
> > TIMER2_WDTCR = 0; // force timeout by writing wrong key
> > TIMER2_WDTCR |= WDTCR_WDFLAG; // clear timeout flag
> > }
> > CFG_TIMERCTL |= 1 // enebale DSP reset
> >
> > // init TGCR and PRD registers
> > TIMER2_WDTCR = WDTCR_WDEN;
> > // write correct keys to WDTCR
> >
> > What I see is, that forcing timeout and clearing the timeout flag works as expected. TGCR is then '0'. But setting the
> > WDEN flag has no effect, the TGCR register stays '0'.
> >
> > Do I forget something or is such a re-init not possible at all? Thanks for your help.
> >
> > Tobias
>
_____________________________________
