GPIO in TMS320c6727

Richard,

Finally I succeeded in lightning the LEDs. The last difficulty was to correctly configure correctly the cfg file to access the Flash on board, but in any case without your helpI could not achieve it.

Thank you very much,

Regards

________________________________
De: Miguel Angel Estudillo Valderrama
Para: Richard Williams
CC: c...
Enviado: vie,2 abril, 2010 14:33
Asunto: Re: Re: [c6x] GPIO in TMS320c6727
Richard,

In spru719a (p.53) it says "GPIO_EN8=1: UHPI_HD[15:8] pins function as GPIO pins" but I agree with you that this can be confusing. In any case the HD[8] at least should work because the corresponding pin is at least is enabled but it seems not even disabling HPI as you commented before.

However you were completely right about using shadow registers and I am using them.

I hope to find soon the solution,

regards,

________________________________
De: Richard Williams
Para: Miguel Angel Estudillo Valderrama
CC: c...st
Enviado: jue,1 abril, 2010 19:59
Asunto: Re: Re: [c6x] GPIO in TMS320c6727

Miguel,

I did not find a definition for CSL_UHPI_GPIO_EN8.
therefore, I made the assumption that it worked similar to the other #defines.
I.E. #define CSL_UHPI_GPIO_EN8 0x00000100
when it needs to be more like:
#define CSL_UHPI_GPIO_EN 0x00000700

so it enables all three of the GPIO pins that are being manipulated.

R. Williams

---------- Original Message -----------
From: Miguel Angel Estudillo Valderrama
To: Richard Williams
Cc: c...
Sent: Thu, 1 Apr 2010 17:28:44 +0000 (GMT)
Subject: Re: Re: [c6x] GPIO in TMS320c6727

> Richard,
>
> First, thank you very much for all your time and effort.
>
> Regarding your last comment, I thought those pins are enabled with this line
>
> /* GPIO_EN8 bank includes the HD[15:8] pin */
> myHwSetup.gpioEnable=CSL_UHPI_ GPIO_EN8;
>
> Im still working on this issue,
>
> best regards
________________________________
De: Richard Williams
> Para: Miguel Angel Estudillo Valderrama
> CC: c...
> Enviado: jue,1 abril, 2010 06:01
> Asunto: Fw: Re: [c6x] GPIO in TMS320c6727
>
>
>
> Miguel,
>
> Still another thing,
>
> For each GPIO bit that you want to use, the related bit in the GPIOEN register in the HPI peripheral must be set to '1'.
>
> R. Williams
>
> ---------- Forwarded Message -----------
> From: "Richard Williams"
> To: Miguel Angel Estudillo Valderrama
> Cc: c6x@yahoogroups. com
> Sent: Tue, 30 Mar 2010 19:10:26 -0700
> Subject: Re: [c6x] GPIO in TMS320c6727
>
> Miguel,
>
> One more thing,
>
> I think the HPI needs to be disabled, (not enabled as is done in your code) to use the lower address pins for GPIO.
>
> R. Williams
>
> ---------- Original Message -----------
> From: Miguel Angel Estudillo Valderrama
> To: ttnguy11@rockwellco llins.com
> Cc: c6x@yahoogroups. com
> Sent: Tue, 30 Mar 2010 18:56:00 +0000 (GMT)
> Subject: Re: [c6x] GPIO in TMS320c6727
>
>
> ________ _________ __
>
> >
> > mi19890@yahoo. es
> > Sent by: c6x@yahoogroups. com
> > 03/30/2010 07:10 AM
> > Please respond to
> > mi19890@yahoo. es
> > To c6x@yahoogroups. com
> > cc
> >
> > Subject [c6x] GPIO in TMS320c6727
> >
> > Hi all,
> >
> > I am trying to write to GPIO-converted HD[8-10] pins from HPI module in
> > a TMS320C6727 custom board but it seems not to work (there is no signal
> > in the corresponding dsp pin) and I do not know why. I am using CSL 3.0
> > libraries (csl_C672x_03_ 00_09_00) and I had to create some enums within
> > csl_uhpi.h file (CSL_UhpiGpioDat1 and CSL_UhpiGpioDir1, at the end of the
> > code) to access to data1 and dir1 registers that manage HD[8-10].
> >
> > Another doubt I had during code programming was if (myHwSetup.gpioData .gpioDataX= CSL_UHPI_ GPIO_DAT1_ X)
> > instruction really writes the data to be output in the corresponding GPIO
> > or not.
> >
> > Attached you will find my code. Any help or code sample would be wonderful,
> >
> > Thank you very much in advance,
> >
> > Best regards,
> > Mi1980
> >
> > +`+`+`+`+`+` +`+`+`+`+ `+`+`+`+` +`+`+`+`+ `+`+`+
> > ************ ********* ********* ********* ******
> > LED.c
> >
> > #include "csl_uhpi.h"
> > #include "csl_chip.h"
> > #include "stdio.h"
> >
> > #define CSL_UHPI_MSB 0x0
> > #define CSL_UHPI_UMB 0x0
> > #define CSL_UHPI_CFG 0x0
> > #define CSL_UHPI_CFG_ FULL 0x8
> > #define CSL_UHPI_CFG_ EN 0x9
> > #define UHPI_TEST_PASSED 0x0
> >
> > /* UHPI Handle Initialize to NULL */
> > CSL_UhpiHandle hUhpi = (CSL_UhpiHandle)
> > NULL;
> > /* CSL status */
> > CSL_Status status;
> >
> > Uint32 response;
> >
> > CSL_UhpiHwSetup
> >
> > myHwSetup;
> >
> > /* forward declaration */
> > void uhpi_error_exit (
> > void
> > );
> >
> > CSL_Status uhpi_test(
> > void
> > );
> > /*
> > * ============ ========= ========= ========= ========= ========= ========= ========= > > * @func main
> > *
> > * @desc
> > * This is the main routine for the file.
> > *
> > * @arg
> > * NONE
> > *
> > * @return
> > * NONE
> > * ============ ========= ========= ========= ========= ========= ========= ========= > > */
> >
> > void main(void){
> > while(1){
> >
> > status = uhpi_test();
> > /* Comparing the HwStatus return value with the HwControl
> > set value */
> > if (status == CSL_SOK) {
> > printf ("UHPI CSL example test passed\n");
> > }
> > else {
> > printf ("UHPI CSL example test Failed\n");
> > }
> > }
> >
> > }
> >
> > /*
> > * ============ ========= ========= ========= ========= ========= ========= ========= > > * @func uhpi_test
> > *
> > * @desc
> > * This function will initialize the UHPI module and also
> > write and read
> > * back the value from the UHPI register.
> > *
> > * @arg
> > * NONE
> > *
> > * @return
> > * NONE
> > * ============ ========= ========= ========= ========= ========= ========= ========= > > */
> >
> > CSL_Status uhpi_test(
> > void
> > )
> > {
> > CSL_UhpiObj uhpiObj;
> > CSL_sysInit( );
> >
> > /* Initialiaze device config registers related to HPI */
> > status = CSL_uhpiInit (NULL);
> > if (status != CSL_SOK) {
> > uhpi_error_exit ();
> > return status;
> > }
> >
> > /* Open the uhpi CSL module */
> > hUhpi = CSL_uhpiOpen (&uhpiObj, CSL_UHPI, NULL, &status);
> > if ((hUhpi == NULL) || (status != CSL_SOK)) {
> > printf ("\nTEST FAILED\nERROR: CSL_UHPI
> > open failed");
> > uhpi_error_exit ();
> > status = CSL_ESYS_BADHANDLE;
> > return status;
> > }
> >
> > /*
> > Configure HPI to openhpi, no byte addressing,
> > half word transfer, non mux mode, and paged memory
> > */
> >
> > /* Configure upper 16 bits of destination address */
> > /* Upper 8 bits */
> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPIAMSB, CSL_UHPI_MSB) ;
> >
> > /* Upper middle 8 bits */
> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPIAUMB, CSL_UHPI_UMB) ;
> >
> > /* Ensure that HPIENA bit is 0 */
> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPI, CSL_UHPI_CFG) ;
> >
> > /* Configure HPI */
> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPI, CSL_UHPI_CFG_ FULL);
> >
> > /* Enable HPI */
> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPI, CSL_UHPI_CFG_ EN);
> >
> > /* enable bits */
> > /* GPIO_EN8 bank includes the HD[15:8] pin */
> > myHwSetup.gpioEnabl e=CSL_UHPI_ GPIO_EN8;
> >
> > // HD[8] dir
> > myHwSetup.gpioDir. gpioDir1= CSL_UHPI_ GPIO_DIR1_ 8;
> > // HD[8] write¿?
> > myHwSetup.gpioData. gpioData1= CSL_UHPI_ GPIO_DAT1_ 8;
> >
> > // HD[9] dir
> > myHwSetup.gpioDir. gpioDir1= CSL_UHPI_ GPIO_DIR1_ 9;
> > // HD[9] write
> > myHwSetup.gpioData. gpioData1= CSL_UHPI_ GPIO_DAT1_ 9;
> >
> > // HD[10]
> > myHwSetup.gpioDir. gpioDir1= CSL_UHPI_ GPIO_DIR1_ 10;
> > // HD[10] write
> > myHwSetup.gpioData. gpioData1= CSL_UHPI_ GPIO_DAT1_ 10;
> >
> > status = CSL_uhpiHwSetup( hUhpi, &myHwSetup);
> >
> > if (status != CSL_SOK) {
> > uhpi_error_exit ();
> >
> > return
> > status;
> > }
> > return status;
> > }
> >
> > /*********** ********* ********* ********* ********* ********* ********* ********* ****
> > * @func uhpi_error_exit
> > *
> > * @desc Error in executing the example. As error is occurred closing the
> > UHPI
> > * handle and returning.
> > *
> > * @arg
> > * NONE
> > *
> > * @return
> > * NONE
> > ************ ********* ********* ********* ********* ********* ********* ********* ***/
> >
> > void uhpi_error_exit (
> > void
> > )
> > {
> > status = CSL_uhpiClose (hUhpi);
> > if (status != CSL_SOK) {
> > status = status;
> > }
> > return;
> > }
> > `
> >
> > +`+`+`+`+`+` +`+`+`+`+ `+`+`+`+` +`+`+`+`+ `+`+`+
> > ************ ********* ********* ********* ******
> >
> > Csl_uhpi.c
> > .
> > .
> > .
> > typedef enum {
> >
> > /* This DAT bit corresponds to the /HD[0] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_0 = 0x1,
> >
> > /* controls/statis the level of the /HD[1] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_1 = 0x2,
> >
> > /* controls/statis the level of the /HD[2] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_2 = 0x4,
> >
> > /* controls/statis the level of the /HD[3] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_3 = 0x8,
> >
> > /* controls/statis the level of the /HD[4] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_4 = 0x10,
> >
> > /* controls/statis the level of the /HD[5] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_5 = 0x20,
> >
> > /* controls/statis the level of the /HD[6] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_6 = 0x40,
> >
> > /* controls/statis the level of the /HD[7] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_7 = 0x80,
> >
> > /* controls/statis the level of the /HD[8] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_8 = 0x100,
> >
> > /* controls/statis the level of the /HD[9] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_9 = 0x200,
> >
> > /* controls/statis the level of the /HD[10] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_10 = 0x400,
> >
> > /* controls/statis the level of the /HD[11] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_11 = 0x800,
> >
> > /* controls/statis the level of the /HD[12] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_12 = 0x1000,
> >
> > /* controls/statis the level of the /HD[13] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_13 = 0x2000,
> >
> > /* controls/statis the level of the /HD[14] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_14 = 0x4000,
> >
> > /* controls/statis the level of the /HD[15] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_15 = 0x8000,
> >
> > /* controls/statis the level of the /HD[16] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_16 = 0x10000,
> >
> > /* controls/statis the level of the /HD[17] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_17 = 0x20000,
> >
> > /* controls/statis the level of the /HD[18] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_18 = 0x40000,
> >
> > /* controls/statis the level of the /HD[19] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_19 = 0x80000,
> >
> > /* controls/statis the level of the /HD[20] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_20 = 0x100000,
> >
> > /* controls/statis the level of the /HD[21] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_21 = 0x200000,
> >
> > /* controls/statis the level of the /HD[22] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_22 = 0x400000,
> >
> > /* controls/statis the level of the /HD[23] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_23 = 0x800000,
> >
> > /* controls/statis the level of the /HD[24] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_24 = 0x1000000,
> >
> > /* controls/statis the level of the /HD[25] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_25 = 0x2000000,
> >
> > /* controls/statis the level of the /HD[26] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_26 = 0x4000000,
> >
> > /* controls/statis the level of the /HD[27] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_27 = 0x8000000,
> >
> > /* controls/statis the level of the /HD[28] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_28 = 0x10000000,
> >
> > /* controls/statis the level of the /HD[29] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_29 = 0x20000000,
> >
> > /* controls/statis the level of the /HD[30] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_30 = 0x40000000,
> >
> > /* controls/statis the level of the /HD[31] pin */
> >
> > CSL_UHPI_GPIO_ DIR1_31 = 0x80000000
> > }CSL_UhpiGpioDir1;
> >
> > typedef enum {
> >
> > /* This DAT bit corresponds to the /HD[0] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_0 = 0x1,
> >
> > /* controls/statis the level of the /HD[1] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_1 = 0x2,
> >
> > /* controls/statis the level of the /HD[2] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_2 = 0x4,
> >
> > /* controls/statis the level of the /HD[3] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_3 = 0x8,
> >
> > /* controls/statis the level of the /HD[4] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_4 = 0x10,
> >
> > /* controls/statis the level of the /HD[5] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_5 = 0x20,
> >
> > /* controls/statis the level of the /HD[6] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_6 = 0x40,
> >
> > /* controls/statis the level of the /HD[7] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_7 = 0x80,
> >
> > /* controls/statis the level of the /HD[8] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_8 = 0x100,
> >
> > /* controls/statis the level of the /HD[9] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_9 = 0x200,
> >
> > /* controls/statis the level of the /HD[10] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_10 = 0x400,
> >
> > /* controls/statis the level of the /HD[11] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_11 = 0x800,
> >
> > /* controls/statis the level of the /HD[12] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_12 = 0x1000,
> >
> > /* controls/statis the level of the /HD[13] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_13 = 0x2000,
> >
> > /* controls/statis the level of the /HD[14] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_14 = 0x4000,
> >
> > /* controls/statis the level of the /HD[15] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_15 = 0x8000,
> >
> > /* controls/statis the level of the /HD[16] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_16 = 0x10000,
> >
> > /* controls/statis the level of the /HD[17] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_17 = 0x20000,
> >
> > /* controls/statis the level of the /HD[18] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_18 = 0x40000,
> >
> > /* controls/statis the level of the /HD[19] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_19 = 0x80000,
> >
> > /* controls/statis the level of the /HD[20] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_20 = 0x100000,
> >
> > /* controls/statis the level of the /HD[21] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_21 = 0x200000,
> >
> > /* controls/statis the level of the /HD[22] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_22 = 0x400000,
> >
> > /* controls/statis the level of the /HD[23] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_23 = 0x800000,
> >
> > /* controls/statis the level of the /HD[24] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_24 = 0x1000000,
> >
> > /* controls/statis the level of the /HD[25] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_25 = 0x2000000,
> >
> > /* controls/statis the level of the /HD[26] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_26 = 0x4000000,
> >
> > /* controls/statis the level of the /HD[27] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_27 = 0x8000000,
> >
> > /* controls/statis the level of the /HD[28] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_28 = 0x10000000,
> >
> > /* controls/statis the level of the /HD[29] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_29 = 0x20000000,
> >
> > /* controls/statis the level of the /HD[30] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_30 = 0x40000000,
> >
> > /* controls/statis the level of the /HD[31] pin */
> >
> > CSL_UHPI_GPIO_ DAT1_31 = 0x80000000
> > }CSL_UhpiGpioDat1;
> > .
> > .
> > .
> ------- End of Forwarded Message ------- Start a New Thread

Miguel-

> Finally I succeeded in lightning the LEDs. The last difficulty
> was to correctly configure correctly the cfg file to
> access the Flash on board, but in any case without your help
>I could not achieve it.

Good work! You're on your way.

-Jeff

> ________________________________
> De: Miguel Angel Estudillo Valderrama
> Para: Richard Williams
> CC: c...
> Enviado: vie,2 abril, 2010 14:33
> Asunto: Re: Re: [c6x] GPIO in TMS320c6727
> Richard,
>
> In spru719a (p.53) it says "GPIO_EN8=1: UHPI_HD[15:8] pins function as GPIO pins" but I agree with you that this can
> be confusing. In any case the HD[8] at least should work because the corresponding pin is at least is enabled but it
> seems not even disabling HPI as you commented before.
>
> However you were completely right about using shadow registers and I am using them.
>
> I hope to find soon the solution,
>
> regards,
> ________________________________
> De: Richard Williams
> Para: Miguel Angel Estudillo Valderrama
> CC: c...st
> Enviado: jue,1 abril, 2010 19:59
> Asunto: Re: Re: [c6x] GPIO in TMS320c6727
>
> Miguel,
>
> I did not find a definition for CSL_UHPI_GPIO_EN8.
> therefore, I made the assumption that it worked similar to the other #defines.
> I.E. #define CSL_UHPI_GPIO_EN8 0x00000100
> when it needs to be more like:
> #define CSL_UHPI_GPIO_EN 0x00000700
>
> so it enables all three of the GPIO pins that are being manipulated.
>
> R. Williams
>
> ---------- Original Message -----------
> From: Miguel Angel Estudillo Valderrama
> To: Richard Williams
> Cc: c...
> Sent: Thu, 1 Apr 2010 17:28:44 +0000 (GMT)
> Subject: Re: Re: [c6x] GPIO in TMS320c6727
>
>> Richard,
>>
>> First, thank you very much for all your time and effort.
>>
>> Regarding your last comment, I thought those pins are enabled with this line
>>
>> /* GPIO_EN8 bank includes the HD[15:8] pin */
>> myHwSetup.gpioEnable=CSL_UHPI_ GPIO_EN8;
>>
>> Im still working on this issue,
>>
>> best regards
> ________________________________
> De: Richard Williams
>> Para: Miguel Angel Estudillo Valderrama
>> CC: c...
>> Enviado: jue,1 abril, 2010 06:01
>> Asunto: Fw: Re: [c6x] GPIO in TMS320c6727
>>
>>
>>
>> Miguel,
>>
>> Still another thing,
>>
>> For each GPIO bit that you want to use, the related bit in the GPIOEN register in the HPI peripheral must be set to
>> '1'.
>>
>> R. Williams
>>
>> ---------- Forwarded Message -----------
>> From: "Richard Williams"
>> To: Miguel Angel Estudillo Valderrama
>> Cc: c6x@yahoogroups. com
>> Sent: Tue, 30 Mar 2010 19:10:26 -0700
>> Subject: Re: [c6x] GPIO in TMS320c6727
>>
>> Miguel,
>>
>> One more thing,
>>
>> I think the HPI needs to be disabled, (not enabled as is done in your code) to use the lower address pins for GPIO.
>>
>> R. Williams
>>
>> ---------- Original Message -----------
>> From: Miguel Angel Estudillo Valderrama
>> To: ttnguy11@rockwellco llins.com
>> Cc: c6x@yahoogroups. com
>> Sent: Tue, 30 Mar 2010 18:56:00 +0000 (GMT)
>> Subject: Re: [c6x] GPIO in TMS320c6727
>>
>>
>> ________ _________ __
>>
>> >
>> > mi19890@yahoo. es
>> > Sent by: c6x@yahoogroups. com
>> > 03/30/2010 07:10 AM
>> > Please respond to
>> > mi19890@yahoo. es
>> > To c6x@yahoogroups. com
>> > cc
>> >
>> > Subject [c6x] GPIO in TMS320c6727
>> >
>> > Hi all,
>> >
>> > I am trying to write to GPIO-converted HD[8-10] pins from HPI module in
>> > a TMS320C6727 custom board but it seems not to work (there is no signal
>> > in the corresponding dsp pin) and I do not know why. I am using CSL 3.0
>> > libraries (csl_C672x_03_ 00_09_00) and I had to create some enums within
>> > csl_uhpi.h file (CSL_UhpiGpioDat1 and CSL_UhpiGpioDir1, at the end of the
>> > code) to access to data1 and dir1 registers that manage HD[8-10].
>> >
>> > Another doubt I had during code programming was if (myHwSetup.gpioData .gpioDataX= CSL_UHPI_ GPIO_DAT1_ X)
>> > instruction really writes the data to be output in the corresponding GPIO
>> > or not.
>> >
>> > Attached you will find my code. Any help or code sample would be wonderful,
>> >
>> > Thank you very much in advance,
>> >
>> > Best regards,
>> > Mi1980
>> >
>> > +`+`+`+`+`+` +`+`+`+`+ `+`+`+`+` +`+`+`+`+ `+`+`+
>> > ************ ********* ********* ********* ******
>> > LED.c
>> >
>> > #include "csl_uhpi.h"
>> > #include "csl_chip.h"
>> > #include "stdio.h"
>> >
>> > #define CSL_UHPI_MSB 0x0
>> > #define CSL_UHPI_UMB 0x0
>> > #define CSL_UHPI_CFG 0x0
>> > #define CSL_UHPI_CFG_ FULL 0x8
>> > #define CSL_UHPI_CFG_ EN 0x9
>> > #define UHPI_TEST_PASSED 0x0
>> >
>> > /* UHPI Handle Initialize to NULL */
>> > CSL_UhpiHandle hUhpi = (CSL_UhpiHandle)
>> > NULL;
>> > /* CSL status */
>> > CSL_Status status;
>> >
>> > Uint32 response;
>> >
>> > CSL_UhpiHwSetup
>> >
>> > myHwSetup;
>> >
>> > /* forward declaration */
>> > void uhpi_error_exit (
>> > void
>> > );
>> >
>> > CSL_Status uhpi_test(
>> > void
>> > );
>> > /*
>> > * ============ ========= ========= ========= ========= ========= ========= ========= >> > * @func main
>> > *
>> > * @desc
>> > * This is the main routine for the file.
>> > *
>> > * @arg
>> > * NONE
>> > *
>> > * @return
>> > * NONE
>> > * ============ ========= ========= ========= ========= ========= ========= ========= >> > */
>> >
>> > void main(void){
>> > while(1){
>> >
>> > status = uhpi_test();
>> > /* Comparing the HwStatus return value with the HwControl
>> > set value */
>> > if (status == CSL_SOK) {
>> > printf ("UHPI CSL example test passed\n");
>> > }
>> > else {
>> > printf ("UHPI CSL example test Failed\n");
>> > }
>> > }
>> >
>> > }
>> >
>> > /*
>> > * ============ ========= ========= ========= ========= ========= ========= ========= >> > * @func uhpi_test
>> > *
>> > * @desc
>> > * This function will initialize the UHPI module and also
>> > write and read
>> > * back the value from the UHPI register.
>> > *
>> > * @arg
>> > * NONE
>> > *
>> > * @return
>> > * NONE
>> > * ============ ========= ========= ========= ========= ========= ========= ========= >> > */
>> >
>> > CSL_Status uhpi_test(
>> > void
>> > )
>> > {
>> > CSL_UhpiObj uhpiObj;
>> > CSL_sysInit( );
>> >
>> > /* Initialiaze device config registers related to HPI */
>> > status = CSL_uhpiInit (NULL);
>> > if (status != CSL_SOK) {
>> > uhpi_error_exit ();
>> > return status;
>> > }
>> >
>> > /* Open the uhpi CSL module */
>> > hUhpi = CSL_uhpiOpen (&uhpiObj, CSL_UHPI, NULL, &status);
>> > if ((hUhpi == NULL) || (status != CSL_SOK)) {
>> > printf ("\nTEST FAILED\nERROR: CSL_UHPI
>> > open failed");
>> > uhpi_error_exit ();
>> > status = CSL_ESYS_BADHANDLE;
>> > return status;
>> > }
>> >
>> > /*
>> > Configure HPI to openhpi, no byte addressing,
>> > half word transfer, non mux mode, and paged memory
>> > */
>> >
>> > /* Configure upper 16 bits of destination address */
>> > /* Upper 8 bits */
>> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPIAMSB, CSL_UHPI_MSB) ;
>> >
>> > /* Upper middle 8 bits */
>> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPIAUMB, CSL_UHPI_UMB) ;
>> >
>> > /* Ensure that HPIENA bit is 0 */
>> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPI, CSL_UHPI_CFG) ;
>> >
>> > /* Configure HPI */
>> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPI, CSL_UHPI_CFG_ FULL);
>> >
>> > /* Enable HPI */
>> > CSL_chipWriteReg (CSL_CHIP_REG_ CFGHPI, CSL_UHPI_CFG_ EN);
>> >
>> > /* enable bits */
>> > /* GPIO_EN8 bank includes the HD[15:8] pin */
>> > myHwSetup.gpioEnabl e=CSL_UHPI_ GPIO_EN8;
>> >
>> > // HD[8] dir
>> > myHwSetup.gpioDir. gpioDir1= CSL_UHPI_ GPIO_DIR1_ 8;
>> > // HD[8] write¿?
>> > myHwSetup.gpioData. gpioData1= CSL_UHPI_ GPIO_DAT1_ 8;
>> >
>> > // HD[9] dir
>> > myHwSetup.gpioDir. gpioDir1= CSL_UHPI_ GPIO_DIR1_ 9;
>> > // HD[9] write
>> > myHwSetup.gpioData. gpioData1= CSL_UHPI_ GPIO_DAT1_ 9;
>> >
>> > // HD[10]
>> > myHwSetup.gpioDir. gpioDir1= CSL_UHPI_ GPIO_DIR1_ 10;
>> > // HD[10] write
>> > myHwSetup.gpioData. gpioData1= CSL_UHPI_ GPIO_DAT1_ 10;
>> >
>> > status = CSL_uhpiHwSetup( hUhpi, &myHwSetup);
>> >
>> > if (status != CSL_SOK) {
>> > uhpi_error_exit ();
>> >
>> > return
>> > status;
>> > }
>> > return status;
>> > }
>> >
>> > /*********** ********* ********* ********* ********* ********* ********* ********* ****
>> > * @func uhpi_error_exit
>> > *
>> > * @desc Error in executing the example. As error is occurred closing the
>> > UHPI
>> > * handle and returning.
>> > *
>> > * @arg
>> > * NONE
>> > *
>> > * @return
>> > * NONE
>> > ************ ********* ********* ********* ********* ********* ********* ********* ***/
>> >
>> > void uhpi_error_exit (
>> > void
>> > )
>> > {
>> > status = CSL_uhpiClose (hUhpi);
>> > if (status != CSL_SOK) {
>> > status = status;
>> > }
>> > return;
>> > }
>> > `
>> >
>> > +`+`+`+`+`+` +`+`+`+`+ `+`+`+`+` +`+`+`+`+ `+`+`+
>> > ************ ********* ********* ********* ******
>> >
>> > Csl_uhpi.c
>> > .
>> > .
>> > .
>> > typedef enum {
>> >
>> > /* This DAT bit corresponds to the /HD[0] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_0 = 0x1,
>> >
>> > /* controls/statis the level of the /HD[1] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_1 = 0x2,
>> >
>> > /* controls/statis the level of the /HD[2] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_2 = 0x4,
>> >
>> > /* controls/statis the level of the /HD[3] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_3 = 0x8,
>> >
>> > /* controls/statis the level of the /HD[4] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_4 = 0x10,
>> >
>> > /* controls/statis the level of the /HD[5] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_5 = 0x20,
>> >
>> > /* controls/statis the level of the /HD[6] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_6 = 0x40,
>> >
>> > /* controls/statis the level of the /HD[7] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_7 = 0x80,
>> >
>> > /* controls/statis the level of the /HD[8] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_8 = 0x100,
>> >
>> > /* controls/statis the level of the /HD[9] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_9 = 0x200,
>> >
>> > /* controls/statis the level of the /HD[10] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_10 = 0x400,
>> >
>> > /* controls/statis the level of the /HD[11] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_11 = 0x800,
>> >
>> > /* controls/statis the level of the /HD[12] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_12 = 0x1000,
>> >
>> > /* controls/statis the level of the /HD[13] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_13 = 0x2000,
>> >
>> > /* controls/statis the level of the /HD[14] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_14 = 0x4000,
>> >
>> > /* controls/statis the level of the /HD[15] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_15 = 0x8000,
>> >
>> > /* controls/statis the level of the /HD[16] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_16 = 0x10000,
>> >
>> > /* controls/statis the level of the /HD[17] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_17 = 0x20000,
>> >
>> > /* controls/statis the level of the /HD[18] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_18 = 0x40000,
>> >
>> > /* controls/statis the level of the /HD[19] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_19 = 0x80000,
>> >
>> > /* controls/statis the level of the /HD[20] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_20 = 0x100000,
>> >
>> > /* controls/statis the level of the /HD[21] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_21 = 0x200000,
>> >
>> > /* controls/statis the level of the /HD[22] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_22 = 0x400000,
>> >
>> > /* controls/statis the level of the /HD[23] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_23 = 0x800000,
>> >
>> > /* controls/statis the level of the /HD[24] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_24 = 0x1000000,
>> >
>> > /* controls/statis the level of the /HD[25] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_25 = 0x2000000,
>> >
>> > /* controls/statis the level of the /HD[26] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_26 = 0x4000000,
>> >
>> > /* controls/statis the level of the /HD[27] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_27 = 0x8000000,
>> >
>> > /* controls/statis the level of the /HD[28] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_28 = 0x10000000,
>> >
>> > /* controls/statis the level of the /HD[29] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_29 = 0x20000000,
>> >
>> > /* controls/statis the level of the /HD[30] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_30 = 0x40000000,
>> >
>> > /* controls/statis the level of the /HD[31] pin */
>> >
>> > CSL_UHPI_GPIO_ DIR1_31 = 0x80000000
>> > }CSL_UhpiGpioDir1;
>> >
>> > typedef enum {
>> >
>> > /* This DAT bit corresponds to the /HD[0] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_0 = 0x1,
>> >
>> > /* controls/statis the level of the /HD[1] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_1 = 0x2,
>> >
>> > /* controls/statis the level of the /HD[2] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_2 = 0x4,
>> >
>> > /* controls/statis the level of the /HD[3] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_3 = 0x8,
>> >
>> > /* controls/statis the level of the /HD[4] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_4 = 0x10,
>> >
>> > /* controls/statis the level of the /HD[5] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_5 = 0x20,
>> >
>> > /* controls/statis the level of the /HD[6] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_6 = 0x40,
>> >
>> > /* controls/statis the level of the /HD[7] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_7 = 0x80,
>> >
>> > /* controls/statis the level of the /HD[8] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_8 = 0x100,
>> >
>> > /* controls/statis the level of the /HD[9] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_9 = 0x200,
>> >
>> > /* controls/statis the level of the /HD[10] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_10 = 0x400,
>> >
>> > /* controls/statis the level of the /HD[11] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_11 = 0x800,
>> >
>> > /* controls/statis the level of the /HD[12] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_12 = 0x1000,
>> >
>> > /* controls/statis the level of the /HD[13] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_13 = 0x2000,
>> >
>> > /* controls/statis the level of the /HD[14] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_14 = 0x4000,
>> >
>> > /* controls/statis the level of the /HD[15] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_15 = 0x8000,
>> >
>> > /* controls/statis the level of the /HD[16] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_16 = 0x10000,
>> >
>> > /* controls/statis the level of the /HD[17] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_17 = 0x20000,
>> >
>> > /* controls/statis the level of the /HD[18] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_18 = 0x40000,
>> >
>> > /* controls/statis the level of the /HD[19] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_19 = 0x80000,
>> >
>> > /* controls/statis the level of the /HD[20] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_20 = 0x100000,
>> >
>> > /* controls/statis the level of the /HD[21] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_21 = 0x200000,
>> >
>> > /* controls/statis the level of the /HD[22] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_22 = 0x400000,
>> >
>> > /* controls/statis the level of the /HD[23] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_23 = 0x800000,
>> >
>> > /* controls/statis the level of the /HD[24] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_24 = 0x1000000,
>> >
>> > /* controls/statis the level of the /HD[25] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_25 = 0x2000000,
>> >
>> > /* controls/statis the level of the /HD[26] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_26 = 0x4000000,
>> >
>> > /* controls/statis the level of the /HD[27] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_27 = 0x8000000,
>> >
>> > /* controls/statis the level of the /HD[28] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_28 = 0x10000000,
>> >
>> > /* controls/statis the level of the /HD[29] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_29 = 0x20000000,
>> >
>> > /* controls/statis the level of the /HD[30] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_30 = 0x40000000,
>> >
>> > /* controls/statis the level of the /HD[31] pin */
>> >
>> > CSL_UHPI_GPIO_ DAT1_31 = 0x80000000
>> > }CSL_UhpiGpioDat1;
>> > .
>> > .
>> > .
>> ------- End of Forwarded Message -------
>

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