DSPRelated.com
Forums

MCBSP 1

Started by Ram January 10, 2003
Hi all, This query is regarding usage of MCBSP 1 on the EVM for TMS320C6701
processor. On the board a 80 pin connector i.e Expansion peripheral interface is
present. The pin number 42 of this interface is stated to be DR pin of MCBSP 1,
and i feel that this interface supports TTL logic. Ti provides daughter boards
for interfacing to MCBSP1, but i don' want to use them. I want to take in a
Serial bit stream from a counter into the DR pin throught the Expansion
Peripheral Interface. Could anybody help me with this question ?? Thanks, Ram




Hello Ram,

Friday, January 10, 2003, 9:51:27 AM, you wrote:

R> Hi all, This query is regarding usage of MCBSP 1 on the EVM for TMS320C6701
processor. On the board a 80 pin connector i.e Expansion peripheral interface is
present. The pin number 42 of this
R> interface is stated to be DR pin of MCBSP 1, and i feel that this interface
supports TTL logic. Ti provides daughter boards for interfacing to MCBSP1, but i
don' want to use them. I want to take
R> in a Serial bit stream from a counter into the DR pin throught the Expansion
Peripheral Interface. Could anybody help me with this question ?? Thanks, Ram If you go to

http://www.samtec.com/technical_specifications/overview.asp?series=TFM you can request some samples.
With this connector you can create a cable where

pin pin
mcbsp0
21 XCLKX0 22 XCLKS0
23 XFSX0 24 XDX0
25 GND 26 GND
27 XCLKR0 28 (N/C)
29 XFSR0 30 XDR0
31 GND 32 GND
mcbsp1
33 XCLKX1 34 XCLKS1
..... as mcbsp0

Warning that if you use a DSK read this :

"The DSP's seven McBSP0 signals are available on the expansion peripheral
interface only if you install JP1 and a shunt. McBSP0, by default (with JP1
uninstalled),
^^^^

is connected to the AIC's serial communication interface. McBSP0,
when JP1 and its shunt are installed, is available for use on the
daughterboard." --
Best regards,
flavio mailto:

--
FLAVIO BERNARDOTTI
AMC Italy srl
Dipartimento di ricerca e sviluppo
Via La Pira, 21
10028 TROFARELLO (TO)
ITALY
Tel. +39 380 7097051

http://www.bernardotti.it


Yes, it is TTL compatible.

It is also 5V tolerant with the buffer on-board, so
you are fine.

Brian

-----Original Message-----
From: Ram [mailto:]
Sent: Friday, January 10, 2003 2:51 AM
To:
Subject: [c6x] MCBSP 1 Hi all, This query is regarding usage of MCBSP 1 on the EVM for TMS320C6701
processor. On the board a 80 pin connector i.e Expansion peripheral
interface is present. The pin number 42 of this interface is stated to be DR
pin of MCBSP 1, and i feel that this interface supports TTL logic. Ti
provides daughter boards for interfacing to MCBSP1, but i don' want to use
them. I want to take in a Serial bit stream from a counter into the DR pin
throught the Expansion Peripheral Interface. Could anybody help me with this
question ?? Thanks, Ram
_____________________________________
Note: If you do a simple "reply" with your email client, only the author of
this message will receive your answer. You need to do a "reply all" if you
want your answer to be distributed to the entire group.

_____________________________________
About this discussion group:

To Join: Send an email to

To Post: Send an email to

To Leave: Send an email to

Archives: http://www.yahoogroups.com/group/c6x

Other Groups: http://www.dsprelated.com ">http://docs.yahoo.com/info/terms/



Hello Brian,

Friday, January 10, 2003, 2:47:40 PM, you wrote:

BC> Yes, it is TTL compatible.

BC> It is also 5V tolerant with the buffer on-board, so
BC> you are fine.

BC> Brian

Or you can set a resitor partition
max 5V-----+
|
-
- R1 1800 ohm
-
|
+---------------- max 3.3V
|
-
- R2 2700 ohm
-
|
gnd -------+---------------- gnd --
Best regards,
flavio mailto:

--
FLAVIO BERNARDOTTI
AMC Italy srl
Dipartimento di ricerca e sviluppo
Via La Pira, 21
10028 TROFARELLO (TO)
ITALY
Tel. +39 380 7097051

http://www.bernardotti.it


Hello Ram,

Friday, January 10, 2003, 9:51:27 AM, you wrote:

R> Hi all, This query is regarding usage of MCBSP 1 on the EVM for TMS320C6701
processor. On the board a 80 pin connector i.e Expansion peripheral interface is
present. The pin number 42 of this
R> interface is stated to be DR pin of MCBSP 1, and i feel that this interface
supports TTL logic. Ti provides daughter boards for interfacing to MCBSP1,
R> but i don' want to use them. I want to take

Why ?
On the Expansion connector of EVM (Samtec model TFM-32-S-D)
there are mcbsp0 (pin 21 -> pin 30) and mcbsp1 (pin 33 -> pin 42).
The limitation of these MCBSP are is the max. speed (100 mbits).

R> in a Serial bit stream from a counter into the DR pin throught the Expansion
Peripheral Interface.
R> Could anybody help me with this question ?? Thanks, Ram

Warning that only one mcbsp is 3.3-5.5V (mcbsp0) .....
In one of my projects I use the mcbsp0 to receive a VGA horizontal
sync and the mcbsp1 to transmit an image.
The mcbsp0 is connected directly to the VGA sync port.
The sync signal is a 0-5V ....
To be sure I use also a resitor partition to create a 3.3V

VGA HSYNC max 5V-----+
|
-
- R1 1800 ohm
-
|
+---------------- PIN 30 EVM Expansion Connector
| XDR0
-
- R2 2700 ohm
-
|
gnd -----------------+---------------- PIN 32 gnd This is a sample routine to receive some data and to insert this into
a buffer...

void task(void) is a task created using BIOS function .....
#include <std.h>

#include <clk.h>
#include <idl.h>
#include <log.h>
#include <sem.h>
#include <swi.h>
#include <tsk.h>

#include <csl_legacy.h>
#include <csl.h>
#include <csl_mcbsp.h>

#include "slicecfg.h"

MCBSP_HANDLE hMcbsp0;

extern far LOG_Obj LogMain; static MCBSP_CONFIG ConfigMcbsp0 = { // La MCBSP0 usata per la ricezione
MCBSP_MK_SPCR(
MCBSP_SPCR_RRST_NO,
MCBSP_SPCR_RINTM_RRDY,
MCBSP_SPCR_DXENA_NA,
MCBSP_SPCR_CLKSTP_DISABLE,
MCBSP_SPCR_RJUST_RZF,
MCBSP_SPCR_DLB_OFF,
MCBSP_SPCR_XRST_YES,
MCBSP_SPCR_XINTM_XRDY,
MCBSP_SPCR_GRST_NO,
MCBSP_SPCR_FRST_NO
),
MCBSP_MK_RCR(
MCBSP_RCR_RWDREVRS_NA,
MCBSP_RCR_RWDLEN1_8BIT,
MCBSP_RCR_RFRLEN1_OF(0),
MCBSP_RCR_RPHASE2_NA,
MCBSP_RCR_RDATDLY_0BIT,
MCBSP_RCR_RFIG_NO,
MCBSP_RCR_RCOMPAND_MSB,
MCBSP_RCR_RWDLEN2_8BIT,
MCBSP_RCR_RFRLEN2_OF(0),
MCBSP_RCR_RPHASE_SINGLE
),
MCBSP_MK_XCR(
MCBSP_XCR_XWDREVRS_NA,
MCBSP_XCR_XWDLEN1_8BIT,
MCBSP_XCR_XFRLEN1_OF(0),
MCBSP_XCR_XPHASE2_NA,
MCBSP_XCR_XDATDLY_0BIT, //
MCBSP_XCR_XFIG_NO,
MCBSP_XCR_XCOMPAND_MSB,
MCBSP_XCR_XWDLEN2_8BIT,
MCBSP_XCR_XFRLEN2_OF(0),
MCBSP_XCR_XPHASE_SINGLE
),
MCBSP_MK_SRGR(
MCBSP_SRGR_CLKGDV_OF(0), // Divisore
MCBSP_SRGR_FWID_OF(0), // Frame width
MCBSP_SRGR_FPER_OF(7), // Period
MCBSP_SRGR_FSGM_FSG, //
MCBSP_SRGR_CLKSM_INTERNAL,
MCBSP_SRGR_CLKSP_RISING,
MCBSP_SRGR_GSYNC_FREE
),
MCBSP_MCR_DEFAULT,
MCBSP_RCER_DEFAULT,
MCBSP_XCER_DEFAULT,
MCBSP_MK_PCR(
MCBSP_PCR_CLKRP_FALLING,
MCBSP_PCR_CLKXP_RISING,
MCBSP_PCR_FSRP_ACTIVEHIGH,
MCBSP_PCR_FSXP_ACTIVEHIGH,
MCBSP_PCR_DXSTAT_0,
MCBSP_PCR_CLKSSTAT_0,
MCBSP_PCR_CLKRM_OUTPUT,
MCBSP_PCR_CLKXM_OUTPUT,
MCBSP_PCR_FSRM_INTERNAL,
MCBSP_PCR_FSXM_INTERNAL,
MCBSP_PCR_RIOEN_SP,
MCBSP_PCR_XIOEN_SP
)
};

Void taskRx(Arg id_arg);

Uns counts_per_us; /* hardware timer counts per microsecond */

Void main()
{
CSL_init();
hMcbsp0 = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
MCBSP_ConfigA(hMcbsp0, &ConfigMcbsp0);
MCBSP_enableSrgr(hMcbsp0);
MCBSP_enableRcv(hMcbsp0);
MCBSP_EnableFsync(hMcbsp0);
}

unsigned char buffer[128];
int blen;

void task(void)
{
Uint32 x;
blen = 0;
while (1) {
if(MCBSP_rrdy(hMcbsp0)) {
x = MCBSP_read(hMcbsp0);
if(blen > 126)
blen = 0;
buffer[blen++] = (unsigned char) (x & 0xff);
}
}
}

--
Best regards,
flavio mailto:

--
FLAVIO BERNARDOTTI
AMC Italy srl
Biometric Security Solutions
Research and Development Department
Via La Pira, 21
10028 TROFARELLO (TO)
ITALY
Tel. +39 011 6804011
Fax. +39 011 6804014
Dir. +39 380 7097051
Dir. +39 347 5610956

http://www.amcitaly.net
http://www.biotracciabilita.info

Personal sites:

http://www.crackinguniversity2000.it
http://www.bernardotti.it
http://www.bernardotti.al.it