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Hi, I'm working with the 6711 DSK and using DSP/BIOS. I'm trying to write code that receives on the McBSP (configured as a UART), uses EDMA to transfer that data into the receive buffer, quickly processes the receive buffer in a HWI, and then triggers a SWI for further processing. The code I have written is behaving strangely (DSK crashes or SWI never gets called), so I just had a few questions that I was hoping someone could answer: 1) The "interrupt" keyword should NOT be included on the EDMA ISR when using the HWI dispatcher, correct? 2) In the EDMA ISR, should it be necessary to re-enable the interrupt (IRQ_intEnable(...)) before returning? TI's example codes never do this, but I don't get more than one interrupt if I don't re-enable. 3) Along the same lines as #2 ... Why is it that TI's codes seem to work even though they never enable the interrupts they are using (look at the BIOS audio example). 4) Is there a difference between HWI_disable and IRQ_disable? Thanks for any help, John |
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McBSP + EDMA + HWI + SWI
Started by ●May 22, 2003
Reply by ●May 22, 20032003-05-22
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This e-mail is subject to the disclaimer set out below. --- Hi John I have a similar set up to you (except my data is triggered by a fifo interrupt). 1) The "interrupt" keyword should NOT be included on the EDMA ISR when using the HWI dispatcher, correct? You don't use the keyword interrupt, that's correct. 2) In the EDMA ISR, should it be necessary to re-enable the interrupt (IRQ_intEnable(...)) before returning? TI's example codes never do this, but I don't get more than one interrupt if I don't re-enable. You need to do IRQ_clear(), and EDMA_intClear() within the EDMA isr, but not IRQ_intEnable(). If you didn't clear the EDMA channel you def won't get more than 1 interrupt. And worth checking your EDMA setup. The HWI dispatcher will disable and re-enable the interrupts for you (right click the HWI properties, there's a dispatcher tab - interrupt mask). Also check how you've set up your McBSP. It's worth checking that you have "use hwi dispatcher" box checked? I had a few crashes before I realised I had to do this (wasn't checked by default). 3) Along the same lines as #2 ... Why is it that TI's codes seem to work even though they never enable the interrupts they are using (look at the BIOS audio example). I think I read somewhere that when you use the hardware dispatcher, interrupts are automatically enabled? I'm not sure, I do it explicitly within my code! 4) Is there a difference between HWI_disable and IRQ_disable? I think the HWI dispatcher will disable and re-enable the interrupts for you (right click the HWI properties, there's a dispatcher tab - interrupt mask). And yes - there is a difference between HWI_disable and IRQ_disable - I'm not sure what it is, but using IRQ_disable in a SWI around code that I didn't want interrupted made my code behave very strangely (fine when I used HWI_disable). HWI_disable, as far as I know, disables the global interrupt pin, which just delays any pending interrupts. I'm not sure exactly how IRQ_disable operates. HTH :) Lesley-Ann -----Original Message----- From: John [mailto:] Sent: 22 May 2003 2:03 AM To: Subject: [c6x] McBSP + EDMA + HWI + SWI Hi, I'm working with the 6711 DSK and using DSP/BIOS. I'm trying to write code that receives on the McBSP (configured as a UART), uses EDMA to transfer that data into the receive buffer, quickly processes the receive buffer in a HWI, and then triggers a SWI for further processing. The code I have written is behaving strangely (DSK crashes or SWI never gets called), so I just had a few questions that I was hoping someone could answer: 1) The "interrupt" keyword should NOT be included on the EDMA ISR when using the HWI dispatcher, correct? 2) In the EDMA ISR, should it be necessary to re-enable the interrupt (IRQ_intEnable(...)) before returning? TI's example codes never do this, but I don't get more than one interrupt if I don't re-enable. You need to do IRQ_clear(), but not IRQ_intEnable(). 3) Along the same lines as #2 ... Why is it that TI's codes seem to work even though they never enable the interrupts they are using (look at the BIOS audio example). 4) Is there a difference between HWI_disable and IRQ_disable? Thanks for any help, John _____________________________________ Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. _____________________________________ About this discussion group: To Join: Send an email to To Post: Send an email to To Leave: Send an email to Archives: http://www.yahoogroups.com/group/c6x Other Groups: http://www.dsprelated.com ">http://docs.yahoo.com/info/terms/ --- This e-mail message is confidential and for use by the addressee only. If you are not the intended recipient, you must not use, disclose, copy or forward this transmission. Please return the message to the sender by replying to it and then delete the message from your computer. The Generics Group provides e-mail services for both itself and a number of its independent spin-out companies. The Generics Group shall not be held liable to any person resulting from the use of any information contained in this e-mail and shall not be liable to any person who acts or omits to do anything in reliance upon it. The Generics Group does not accept responsibility for changes made to this message after it was sent. |
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Reply by ●May 22, 20032003-05-22
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Ah well, I was really hoping this solution would work, but no luck! The behavior is very strange, the interrupts will arrive (I've got a global counter in the ISR), but the SWI almost never gets posted. Instead, the DSP seems to be spinning in "LNK" code (it's always in LNK code when I hit halt). I'm using the dispatcher and my ISR looks like: void int08(void) { EDMA_intDispatcher(); IRQ_clear(IRQ_EVT_EDMAINT); IRQ_enable(IRQ_EVT_EDMAINT); } The EDMA interrupt dispatcher calls this function that has this code in it: void f(unsigned int x) { num_interrupts++; enqueue(&bq,x); //my own function. it's got HWI_disable/HWI_enable around it for safety SWI_post(&SWI_handler); } Anyone see anything out of the ordinary? -John "McClean, Lesley-Ann" <> wrote: And yes - there is a difference between HWI_disable and IRQ_disable - I'm not sure what it is, but using IRQ_disable in a SWI around code that I didn't want interrupted made my code behave very strangely (fine when I used HWI_disable). Lesley-Ann --------------------------------- |
Reply by ●May 22, 20032003-05-22
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Our code is configured almost the same way as yours. We have two
mcbsp's configured as UART's, we EDMA into an onchip buffer, within the EDMA ISR we transfer the data and post an SWI. [JOHN] 1) The "interrupt" keyword should NOT be included on the EDMA ISR when using the HWI dispatcher, correct? That is correct. If I recall, the code will hang if you try to use the interrupt keyword and the dispatcher simultaneously. [JOHN] 2) In the EDMA ISR, should it be necessary to re-enable the interrupt (IRQ_intEnable(...)) before returning? TI's example codes never do this, but I don't get more than one interrupt if I don't re-enable. You should not have to re-enable interrupts in your ISR. However, unless you have a round-robin set of buffers for the receive end, you will probably need reset the EDMA registers to their appropriate starting values in order for the next set of data to be red. I highly recommend using round-robin or ping-pong buffers. [JOHN] 3) Along the same lines as #2 ... Why is it that TI's codes seem to work even though they never enable the interrupts they are using (look at the BIOS audio example). DSP/BIOS will automatically enable the global interrupt bit upon dropping out of main. However, we have had to explicitly enable the appropriate interrupt in our code. Not sure they can get away with not enabling the EDMA interrupt explicitly in code (Note this is assuming Code Composers 1.2) We have not encountered your exact situation but here is a couple of some issues to watch out for: A) If you EDMA into off-chip memory (say SDRAM) you will have sever data corruption unless you explicitly resolve cache mis-matches by forcing a cleanup. EMDA into on-chip memory is much simpered to deal with . This assume of course that you are using 3-way cache or less. 4-way cache of course using all onchip memory as cache. B) Many of the important EDMA registers bits can be set to 1 but setting to 0 has no effect. Reading the register may indicated something other than what is meant by writing to it. As such avoid operations such as EDMA_xxx |= EDMA_xxx & 0x07 for those registers where this is the case. The result may be inappropriate bits being set. Finally, At one point in time there was an online lecture at the TI website on using EDMA. It is a useful presentation you may want to view it. -----Original Message----- From: John [mailto:] Sent: Wednesday, May 21, 2003 6:03 PM To: Subject: [c6x] McBSP + EDMA + HWI + SWI Hi, I'm working with the 6711 DSK and using DSP/BIOS. I'm trying to write code that receives on the McBSP (configured as a UART), uses EDMA to transfer that data into the receive buffer, quickly processes the receive buffer in a HWI, and then triggers a SWI for further processing. The code I have written is behaving strangely (DSK crashes or SWI never gets called), so I just had a few questions that I was hoping someone could answer: 1) The "interrupt" keyword should NOT be included on the EDMA ISR when using the HWI dispatcher, correct? 2) In the EDMA ISR, should it be necessary to re-enable the interrupt (IRQ_intEnable(...)) before returning? TI's example codes never do this, but I don't get more than one interrupt if I don't re-enable. 3) Along the same lines as #2 ... Why is it that TI's codes seem to work even though they never enable the interrupts they are using (look at the BIOS audio example). 4) Is there a difference between HWI_disable and IRQ_disable? Thanks for any help, John _____________________________________ Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. _____________________________________ About this discussion group: To Join: Send an email to To Post: Send an email to To Leave: Send an email to Archives: http://www.yahoogroups.com/group/c6x Other Groups: http://www.dsprelated.com ">http://docs.yahoo.com/info/terms/ |
Reply by ●May 22, 20032003-05-22
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A few notes: 1) The interrupt keyword is used when NOT using DSP/BIOS - as pointed out below using the compiler 'interrupt' keyword with BIOS will fail. 2) Using the interrupt dispatcher is a general approach that will guarantee a 'C' register context save/restore for the ISR. The interrupt enable will be managed for you by the dispatcher. 3) If you want finer grain control of what registers are saved, then you can opt to not use the dispatcher and use the HWI_enter and HWI_exit macros (see DSP/BIOS User's Guide for info). 4) Manipulating the state of the interrupt mask with HWI_disable or IRQ_disable is not necessary as both the interrupt dispatcher and HWI_enter/exit macros do this for you. 5) As for enabling interrupts upon real time application start, Brad is correct that this is handled at a well known instant after exit from main() - in BIOS_start(). If you want to see source for this look in c:\ti\c6000\bios\src\misc\boot.c . The guidance provided by Brad below with respect to cache is definitely important info. If you are looking for a driver that demonstrates McBSP + EDMA + HWI + SWI then a very good resource is the Device Driver Developer's kit (DDDK). See: http://dspvillage.ti.com/docs/catalog/software/details.jhtml?templateIdQ54 &path=templatedata/cm/swdetail/data/perifdvr_ddk Thom -----Original Message----- From: Brad Cadle [mailto:] Sent: Thursday, May 22, 2003 9:54 AM To: 'John'; Subject: RE: [c6x] McBSP + EDMA + HWI + SWI Our code is configured almost the same way as yours. We have two mcbsp's configured as UART's, we EDMA into an onchip buffer, within the EDMA ISR we transfer the data and post an SWI. [JOHN] 1) The "interrupt" keyword should NOT be included on the EDMA ISR when using the HWI dispatcher, correct? That is correct. If I recall, the code will hang if you try to use the interrupt keyword and the dispatcher simultaneously. [JOHN] 2) In the EDMA ISR, should it be necessary to re-enable the interrupt (IRQ_intEnable(...)) before returning? TI's example codes never do this, but I don't get more than one interrupt if I don't re-enable. You should not have to re-enable interrupts in your ISR. However, unless you have a round-robin set of buffers for the receive end, you will probably need reset the EDMA registers to their appropriate stariscting values in order for the next set of data to be red. I highly recommend using round-robin or ping-pong buffers. [JOHN] 3) Along the same lines as #2 ... Why is it that TI's codes seem to work even though they never enable the interrupts they are using (look at the BIOS audio example). DSP/BIOS will automatically enable the global interrupt bit upon dropping out of main. However, we have had to explicitly enable the appropriate interrupt in our code. Not sure they can get away with not enabling the EDMA interrupt explicitly in code (Note this is assuming Code Composers 1.2) We have not encountered your exact situation but here is a couple of some issues to watch out for: A) If you EDMA into off-chip memory (say SDRAM) you will have sever data corruption unless you explicitly resolve cache mis-matches by forcing a cleanup. EMDA into on-chip memory is much simpered to deal with . This assume of course that you are using 3-way cache or less. 4-way cache of course using all onchip memory as cache. B) Many of the important EDMA registers bits can be set to 1 but setting to 0 has no effect. Reading the register may indicated something other than what is meant by writing to it. As such avoid operations such as EDMA_xxx |= EDMA_xxx & 0x07 for those registers where this is the case. The result may be inappropriate bits being set. Finally, At one point in time there was an online lecture at the TI website on using EDMA. It is a useful presentation you may want to view it. -----Original Message----- From: John [mailto:] Sent: Wednesday, May 21, 2003 6:03 PM To: Subject: [c6x] McBSP + EDMA + HWI + SWI Hi, I'm working with the 6711 DSK and using DSP/BIOS. I'm trying to write code that receives on the McBSP (configured as a UART), uses EDMA to transfer that data into the receive buffer, quickly processes the receive buffer in a HWI, and then triggers a SWI for further processing. The code I have written is behaving strangely (DSK crashes or SWI never gets called), so I just had a few questions that I was hoping someone could answer: 1) The "interrupt" keyword should NOT be included on the EDMA ISR when using the HWI dispatcher, correct? 2) In the EDMA ISR, should it be necessary to re-enable the interrupt (IRQ_intEnable(...)) before returning? TI's example codes never do this, but I don't get more than one interrupt if I don't re-enable. 3) Along the same lines as #2 ... Why is it that TI's codes seem to work even though they never enable the interrupts they are using (look at the BIOS audio example). 4) Is there a difference between HWI_disable and IRQ_disable? Thanks for any help, John _____________________________________ Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. _____________________________________ About this discussion group: To Join: Send an email to To Post: Send an email to To Leave: Send an email to Archives: http://www.yahoogroups.com/group/c6x Other Groups: http://www.dsprelated.com ">http://docs.yahoo.com/info/terms/ _____________________________________ Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. _____________________________________ About this discussion group: To Join: Send an email to To Post: Send an email to To Leave: Send an email to Archives: http://www.yahoogroups.com/group/c6x Other Groups: http://www.dsprelated.com ">http://docs.yahoo.com/info/terms/ |
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Reply by ●May 22, 20032003-05-22
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Thanks guys,
Pointing me towards the DDK was most helpful. I already had the
example on my hard drive, but I guess I hadn't looked through it carefully
enough.
The solution was as follows:
I had an interrupt mapped through the config tool to interrupt 08, using
the dispatcher. This function did not have the "interrupt" keyword on
it. Basically, all it did was call EDMA_intDispatcher() and return;
In the DDK example, I caught the line "HWI_dispatchPlug(IRQ_EVT_EDMAINT,
(Fxn)EDMA_intDispatcher, -1, NULL);", and decided to give it a whirl. I
added that exact line and switched interrupt 08 in the config tool back to
HWI_unused. Everything works perfectly now! I wonder what the
difference could be between what I had before and what I have now?
Thanks for your help!
-John Humphrey
"Maughan, Thomas" <t...@ti.com> wrote: A few notes: |
