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EDMA with c64x

Started by Anand K September 3, 2003


Hello friends:

I left this one out on my previous post. I am curious to know whether
or not the EDMA mechanism changed from C62x to the C64X processors.
By reading SPRU190 (Peripherals Reference Guide), it seems it did
not. The EDMA wait times on C64x for the exact same design I had on
C62x are annoyingly longer (in terms of clock-cycles and percent of
total time) than those on the C62x.

My question is, do I necessarily have to do more processing than on
C62X to reduce the EDMA wait times ? I mean, real processing, not
just increasing the amount of data transferred/processed.

Looking forward to your comments and ideas. Thanks to Mike and
Indrajit for sharing their views on optimization.

Regards
ka



ka,
 
The 64x EDMA does appear to be an extension of the 621x/671x EDMA.  There does seem to be some functions relating to cache and EDMA that are longer [in clock cycles] - but overall I like the performance of the c64. 
 
When you say 'EDMA wait times', I am not sure of the meaning.  Are you referring to latency?? or setup time??
 
mikedunn

Anand K <a...@yahoo.com> wrote:


Hello friends:

I left this one out on my previous post. I am curious to know whether
or not the EDMA mechanism changed from C62x to the C64X processors.
By reading SPRU190 (Peripherals Reference Guide), it seems it did
not. The EDMA wait times on C64x for the exact same design I had on
C62x are annoyingly longer (in terms of clock-cycles and percent of
total time) than those on the C62x.

My question is, do I necessarily have to do more processing than on
C62X to reduce the EDMA wait times ? I mean, real processing, not
just increasing the amount of data transferred/processed.

Looking forward to your comments and ideas. Thanks to Mike and
Indrajit for sharing their views on optimization.

Regards
ka
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Mike, when I say "EDMA wait time" - I mean the idle time, when the
CPU sits doing nothing waiting for an EDMA transfer to complete. For
e.g. in a ping-pong buffering scheme, CPU has processed ping buffer
and waiting for pong buffer to be transferred into the Internal SRAM.
(Apologize for the ambiguity, is there a more tangible term for
this ?)

I am also wondering if the extra priority level on the C64x would
help mitigate the long wait times, havent experimented with that yet.

ka

--- In , Mike Dunn <mike-dunn@s...> wrote:
> ka,
>
> The 64x EDMA does appear to be an extension of the 621x/671x EDMA.
There does seem to be some functions relating to cache and EDMA that
are longer [in clock cycles] - but overall I like the performance of
the c64.
>
> When you say 'EDMA wait times', I am not sure of the meaning. Are
you referring to latency?? or setup time??
>
> mikedunn
>
> Anand K <akalya@y...> wrote: > Hello friends:
>
> I left this one out on my previous post. I am curious to know
whether
> or not the EDMA mechanism changed from C62x to the C64X processors.
> By reading SPRU190 (Peripherals Reference Guide), it seems it did
> not. The EDMA wait times on C64x for the exact same design I had on
> C62x are annoyingly longer (in terms of clock-cycles and percent of
> total time) than those on the C62x.
>
> My question is, do I necessarily have to do more processing than on
> C62X to reduce the EDMA wait times ? I mean, real processing, not
> just increasing the amount of data transferred/processed.
>
> Looking forward to your comments and ideas. Thanks to Mike and
> Indrajit for sharing their views on optimization.
>
> Regards
> ka
>




ka,
 
I was wondering if that was what you meant - most of us would love to have that problem   [:-)
 
It seems to me that the wait times are longer because you have more horsepower.
 
I do not know your architecture - are you just EDMAing from SDRAM to IRAM or is this data coming from IO??  If you are just coping RAM and your DSP has nothing to do, you could try to operate on SDRAM directly and see what that does for your overall processing time.
 
You might review/experiment with you EDMA setup.  Also, if your algo permits it, you might play with the transfer count.
 
mikedunn

Anand K <a...@yahoo.com> wrote:

Mike, when I say "EDMA wait time" - I mean the idle time, when the
CPU sits doing nothing waiting for an EDMA transfer to complete. For
e.g. in a ping-pong buffering scheme, CPU has processed ping buffer
and waiting for pong buffer to be transferred into the Internal SRAM.
(Apologize for the ambiguity, is there a more tangible term for
this ?)

I am also wondering if the extra priority level on the C64x would
help mitigate the long wait times, havent experimented with that yet.

ka

--- In c...@yahoogroups.com, Mike Dunn wrote:
> ka,
>
> The 64x EDMA does appear to be an extension of the 621x/671x EDMA.
There does seem to be some functions relating to cache and EDMA that
are longer [in clock cycles] - but overall I like the performance of
the c64.
>
> When you say 'EDMA wait times', I am not sure of the meaning. Are
you referring to latency?? or setup time??
>
> mikedunn
>
> Anand K wrote:> Hello friends:
>
> I left this one out on my previous post. I am curious to know
whether
> or not the EDMA mechanism changed from C62x to the C64X processors.
> By reading SPRU190 (Peripherals Reference Guide), it seems it did
> not. The EDMA wait times on C64x for the exact same design I had on
> C62x are annoyingly longer (in terms of clock-cycles and percent of
> total time) than those on the C62x.
>
> My question is, do I necessarily have to do more processing than on
> C62X to reduce the EDMA wait times ? I mean, real processing, not
> just increasing the amount of data transferred/processed.
>
> Looking forward to your comments and ideas. Thanks to Mike and
> Indrajit for sharing their views on optimization.
>
> Regards
> ka_____________________________________
Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group.

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